diff mbox

mtd: nand: Fix timing setup for NANDs that do not support SET FEATURES

Message ID 1501489796-7264-1-git-send-email-boris.brezillon@free-electrons.com
State Accepted
Delegated to: Boris Brezillon
Headers show

Commit Message

Boris Brezillon July 31, 2017, 8:29 a.m. UTC
Some ONFI NANDs do not support the SET/GET FEATURES commands, which,
according to the spec, is perfectly valid.

On these NANDs we can't set a specific timing mode using the "timing
mode" feature, and we should assume the NAND does not require any setup
to enter a specific timing mode.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
Reported-by: Alexander Dahl <ada@thorsis.com>
Cc: <stable@vger.kernel.org>
---
 drivers/mtd/nand/nand_base.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Alexander Dahl July 31, 2017, 11:52 a.m. UTC | #1
Hello,

Tested-by: Alexander Dahl <ada@thorsis.com>

Greets
Alex

Am Montag, 31. Juli 2017, 10:29:56 schrieb Boris Brezillon:
> Some ONFI NANDs do not support the SET/GET FEATURES commands, which,
> according to the spec, is perfectly valid.
> 
> On these NANDs we can't set a specific timing mode using the "timing
> mode" feature, and we should assume the NAND does not require any
> setup to enter a specific timing mode.
> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
> Reported-by: Alexander Dahl <ada@thorsis.com>
> Cc: <stable@vger.kernel.org>
> ---
>  drivers/mtd/nand/nand_base.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c
> b/drivers/mtd/nand/nand_base.c index 7b3826b42447..f2bd2c00a8a1
> 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -1131,7 +1131,9 @@ static int nand_setup_data_interface(struct
> nand_chip *chip, int chipnr) * Ensure the timing mode has been
> changed on the chip side * before changing timings on the controller
> side.
>  	 */
> -	if (chip->onfi_version) {
> +	if (chip->onfi_version &&
> +	    (le16_to_cpu(chip->onfi_params.opt_cmd) &
> +	     ONFI_OPT_CMD_SET_GET_FEATURES)) {
>  		u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
>  			chip->onfi_timing_mode_default,
>  		};
Boris Brezillon July 31, 2017, 4:28 p.m. UTC | #2
On Mon, 31 Jul 2017 10:29:56 +0200
Boris Brezillon <boris.brezillon@free-electrons.com> wrote:

> Some ONFI NANDs do not support the SET/GET FEATURES commands, which,
> according to the spec, is perfectly valid.
> 
> On these NANDs we can't set a specific timing mode using the "timing
> mode" feature, and we should assume the NAND does not require any setup
> to enter a specific timing mode.

Applied to nand/fixes.

> 
> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
> Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
> Reported-by: Alexander Dahl <ada@thorsis.com>
> Cc: <stable@vger.kernel.org>
> ---
>  drivers/mtd/nand/nand_base.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
> index 7b3826b42447..f2bd2c00a8a1 100644
> --- a/drivers/mtd/nand/nand_base.c
> +++ b/drivers/mtd/nand/nand_base.c
> @@ -1131,7 +1131,9 @@ static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
>  	 * Ensure the timing mode has been changed on the chip side
>  	 * before changing timings on the controller side.
>  	 */
> -	if (chip->onfi_version) {
> +	if (chip->onfi_version &&
> +	    (le16_to_cpu(chip->onfi_params.opt_cmd) &
> +	     ONFI_OPT_CMD_SET_GET_FEATURES)) {
>  		u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
>  			chip->onfi_timing_mode_default,
>  		};
diff mbox

Patch

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 7b3826b42447..f2bd2c00a8a1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -1131,7 +1131,9 @@  static int nand_setup_data_interface(struct nand_chip *chip, int chipnr)
 	 * Ensure the timing mode has been changed on the chip side
 	 * before changing timings on the controller side.
 	 */
-	if (chip->onfi_version) {
+	if (chip->onfi_version &&
+	    (le16_to_cpu(chip->onfi_params.opt_cmd) &
+	     ONFI_OPT_CMD_SET_GET_FEATURES)) {
 		u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
 			chip->onfi_timing_mode_default,
 		};