| Message ID | 1494952545-5089-1-git-send-email-boris.brezillon@free-electrons.com |
|---|---|
| State | Accepted |
| Commit | 2165c4a1f71a04c7ea6493f18740a3afd4e47e4f |
| Delegated to: | Boris Brezillon |
| Headers | show |
Hello, On Tue, 16 May 2017 18:35:45 +0200, Boris Brezillon wrote: > READ0 is sometimes used to exit GET STATUS mode. When this is the case > no address cycles are requested, and we can use this information to > detect that READSTART should not be issued after READ0 or that we > shouldn't wait for the chip to be ready. > > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> On Spear600, which has the FSMC NAND controller, on a platform with a Micron SLC NAND with on-die ECC. Tested both mtd_speedtest.ko and mtd_nandbiterrs.ko. The speedtest shows a nice read speed improvements. Before: mtd_speedtest: eraseblock read speed is 8545 KiB/s mtd_speedtest: page read speed is 8428 KiB/s mtd_speedtest: 2 page read speed is 8486 KiB/s After: mtd_speedtest: eraseblock read speed is 9834 KiB/s mtd_speedtest: page read speed is 9682 KiB/s mtd_speedtest: 2 page read speed is 9756 KiB/s The write and erase speeds are unchanged. Thanks! Thomas
On Tue, 16 May 2017 18:35:45 +0200 Boris Brezillon <boris.brezillon@free-electrons.com> wrote: > READ0 is sometimes used to exit GET STATUS mode. When this is the case > no address cycles are requested, and we can use this information to > detect that READSTART should not be issued after READ0 or that we > shouldn't wait for the chip to be ready. > Applied to nand/next. > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> > --- > drivers/mtd/nand/nand_base.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c > index 08ff98c47e1f..fe87bd3513fa 100644 > --- a/drivers/mtd/nand/nand_base.c > +++ b/drivers/mtd/nand/nand_base.c > @@ -753,6 +753,16 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, > return; > > /* This applies to read commands */ > + case NAND_CMD_READ0: > + /* > + * READ0 is sometimes used to exit GET STATUS mode. When this > + * is the case no address cycles are requested, and we can use > + * this information to detect that we should not wait for the > + * device to be ready. > + */ > + if (column == -1 && page_addr == -1) > + return; > + > default: > /* > * If we don't have access to the busy pin, we apply the given > @@ -887,6 +897,15 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, > return; > > case NAND_CMD_READ0: > + /* > + * READ0 is sometimes used to exit GET STATUS mode. When this > + * is the case no address cycles are requested, and we can use > + * this information to detect that READSTART should not be > + * issued. > + */ > + if (column == -1 && page_addr == -1) > + return; > + > chip->cmd_ctrl(mtd, NAND_CMD_READSTART, > NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); > chip->cmd_ctrl(mtd, NAND_CMD_NONE,
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 08ff98c47e1f..fe87bd3513fa 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -753,6 +753,16 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, return; /* This applies to read commands */ + case NAND_CMD_READ0: + /* + * READ0 is sometimes used to exit GET STATUS mode. When this + * is the case no address cycles are requested, and we can use + * this information to detect that we should not wait for the + * device to be ready. + */ + if (column == -1 && page_addr == -1) + return; + default: /* * If we don't have access to the busy pin, we apply the given @@ -887,6 +897,15 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, return; case NAND_CMD_READ0: + /* + * READ0 is sometimes used to exit GET STATUS mode. When this + * is the case no address cycles are requested, and we can use + * this information to detect that READSTART should not be + * issued. + */ + if (column == -1 && page_addr == -1) + return; + chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); chip->cmd_ctrl(mtd, NAND_CMD_NONE,
READ0 is sometimes used to exit GET STATUS mode. When this is the case no address cycles are requested, and we can use this information to detect that READSTART should not be issued after READ0 or that we shouldn't wait for the chip to be ready. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> --- drivers/mtd/nand/nand_base.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)