From patchwork Thu Jan 26 15:18:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: mark.marshall@omicronenergy.com X-Patchwork-Id: 720209 X-Patchwork-Delegate: boris.brezillon@free-electrons.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3v8Qb64LXvz9tjt for ; Fri, 27 Jan 2017 02:20:18 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=omicronenergy.com header.i=@omicronenergy.com header.b="q0LKJHNn"; dkim-atps=neutral Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cWlqR-0006xF-4Y; Thu, 26 Jan 2017 15:20:15 +0000 Received: from ns.omicron.at ([212.183.10.25]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cWlpx-0006u7-Nr for linux-mtd@lists.infradead.org; Thu, 26 Jan 2017 15:19:51 +0000 Received: from MGW01-ATKLA.omicron.at ([172.25.62.34]) by ns.omicron.at (8.15.2/8.15.2) with ESMTPS id v0QFIvp3023324 (version=TLSv1.2 cipher=DHE-RSA-AES256-SHA256 bits=256 verify=FAIL); Thu, 26 Jan 2017 16:18:58 +0100 DKIM-Filter: OpenDKIM Filter v2.10.3 ns.omicron.at v0QFIvp3023324 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=omicronenergy.com; s=default; t=1485443940; bh=c6QW7HODwX1Butva1M+OhiI1Ktos2Aq6aFF7eCNoBZs=; h=From:To:CC:Subject:Date:From; b=q0LKJHNnduUStWOmNSnLlKrInm3ljkfpl0qwUKCmcLQusv18+NjvUIWXig6GDW6j5 gPIhNJYHdsfQQmOnmpctL37HjOqR2J0pHO7bGhqfcPocqqDLwMxVA+lPnoEyp9TIaN 9303byKoD26WAaDq1jchP9dFULL+Q5JPBAl9g4XQ= Received: from EXC01-ATKLA.omicron.at ([172.22.100.185]) by MGW01-ATKLA.omicron.at with ESMTP id v0QFIvMR032545-v0QFIvMT032545 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=CAFAIL); Thu, 26 Jan 2017 16:18:57 +0100 Received: from marmar13.omicron.at (172.22.32.163) by EXC01-ATKLA.omicron.at (172.22.100.185) with Microsoft SMTP Server (TLS) id 15.0.1178.4; Thu, 26 Jan 2017 16:18:57 +0100 From: To: , Subject: [PATCH V2] mtd/ifc: Fix location of eccstat registers for IFC V1.0 Date: Thu, 26 Jan 2017 16:18:27 +0100 Message-ID: <1485443907-11630-1-git-send-email-mark.marshall@omicronenergy.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [172.22.32.163] X-ClientProxiedBy: EXC01-ATKLA.omicron.at (172.22.100.185) To EXC01-ATKLA.omicron.at (172.22.100.185) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170126_071946_310787_64368B7B X-CRM114-Status: GOOD ( 12.12 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.183.10.25 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: boris.brezillon@free-electrons.com, markmarshall14@gmail.com, Mark Marshall , prabhakar.kushwaha@nxp.com, stable@vger.kernel.org, leoyang.li@nxp.com, oss@buserror.net, raghav.dogra@nxp.com, linuxppc-dev@lists.ozlabs.org, raghav@freescale.com, b44839@freescale.com Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Mark Marshall The commit 7a654172161c ("mtd/ifc: Add support for IFC controller version 2.0") added support for version 2.0 of the IFC controller. The version 2.0 controller has the ECC status registers at a different location to the previous versions. Correct the fsl_ifc_nand structure so that the ECC status can be read from the correct location for both version 1.0 and 2.0 of the controller. Cc: stable@vger.kernel.org Fixes: 7a654172161c ("mtd/ifc: Add support for IFC controller version 2.0") Signed-off-by: Mark Marshall --- Changes since v1: - simplified the reading of the registers. drivers/mtd/nand/fsl_ifc_nand.c | 8 +++++++- include/linux/fsl_ifc.h | 8 ++++++-- 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 0a177b1..d1570f5 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -258,9 +258,15 @@ static void fsl_ifc_run_command(struct mtd_info *mtd) int bufnum = nctrl->page & priv->bufnum_mask; int sector = bufnum * chip->ecc.steps; int sector_end = sector + chip->ecc.steps - 1; + __be32 *eccstat_regs; + + if (ctrl->version >= FSL_IFC_VERSION_2_0_0) + eccstat_regs = ifc->ifc_nand.v2_nand_eccstat; + else + eccstat_regs = ifc->ifc_nand.v1_nand_eccstat; for (i = sector / 4; i <= sector_end / 4; i++) - eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]); + eccstat[i] = ifc_in32(&eccstat_regs[i]); for (i = sector; i <= sector_end; i++) { errors = check_read_ecc(mtd, ctrl, eccstat, i); diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h index 3f9778c..c332f0a 100644 --- a/include/linux/fsl_ifc.h +++ b/include/linux/fsl_ifc.h @@ -733,8 +733,12 @@ struct fsl_ifc_nand { __be32 nand_erattr1; u32 res19[0x10]; __be32 nand_fsr; - u32 res20[0x3]; - __be32 nand_eccstat[6]; + u32 res20; + /* The V1 nand_eccstat is actually 4 words that overlaps the + * V2 nand_eccstat. + */ + __be32 v1_nand_eccstat[2]; + __be32 v2_nand_eccstat[6]; u32 res21[0x1c]; __be32 nanndcr; u32 res22[0x2];