From patchwork Fri Aug 14 03:28:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 507260 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id E97061401DE for ; Fri, 14 Aug 2015 13:30:32 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZQ5fm-0003bD-Ur; Fri, 14 Aug 2015 03:28:50 +0000 Received: from mail-out.m-online.net ([212.18.0.10]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZQ5fg-0003Un-Vr for linux-mtd@lists.infradead.org; Fri, 14 Aug 2015 03:28:46 +0000 Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3msqwg1RTVz3hhkr; Fri, 14 Aug 2015 05:28:19 +0200 (CEST) X-Auth-Info: Iw2l3dE4vYEtn/AQDzFLpHFwvQ+OXM6ZpwVMBXPLjaQ= Received: from chi.lan (unknown [195.140.253.167]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3msqwf3nMLzvdWt; Fri, 14 Aug 2015 05:28:18 +0200 (CEST) From: Marek Vasut To: linux-mtd@lists.infradead.org Subject: [PATCH V7 1/2] mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driver. Date: Fri, 14 Aug 2015 05:28:11 +0200 Message-Id: <1439522892-7524-1-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.1.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150813_202845_436926_48057FB2 X-CRM114-Status: GOOD ( 12.16 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [212.18.0.10 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [212.18.0.10 listed in wl.mailspike.net] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , devicetree@vger.kernel.org, Alan Tull , Yves Vandervennet , Dinh Nguyen , Brian Norris , David Woodhouse , Vikas MANOCHA , Graham Moore MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Graham Moore Add binding document for the Cadence QSPI controller. Signed-off-by: Graham Moore Signed-off-by: Marek Vasut Cc: Alan Tull Cc: Brian Norris Cc: David Woodhouse Cc: Dinh Nguyen Cc: Graham Moore Cc: Vikas MANOCHA Cc: Yves Vandervennet Cc: devicetree@vger.kernel.org --- .../devicetree/bindings/mtd/cadence_quadspi.txt | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/cadence_quadspi.txt V2: Add cdns prefix to driver-specific bindings. V3: Use existing property "is-decoded-cs" instead of creating a duplicate, "ext-decoder". Timing parameters are in nanoseconds, not master reference clocks. Remove bus-num completely. V4: Add new properties fifo-width and trigger-address V7: - Prefix all of the Cadence-specific properties with cdns prefix, those are in particular "cdns,is-decoded-cs", "cdns,fifo-depth", "cdns,fifo-width", "cdns,trigger-address". - Drop bogus properties which were not used and were incorrect. diff --git a/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt new file mode 100644 index 0000000..ebaf1fd --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/cadence_quadspi.txt @@ -0,0 +1,50 @@ +* Cadence Quad SPI controller + +Required properties: +- compatible : Should be "cdns,qspi-nor". +- reg : Contains two entries, each of which is a tuple consisting of a + physical address and length. The first entry is the address and + length of the controller register set. The second entry is the + address and length of the QSPI Controller data area. +- interrupts : Unit interrupt specifier for the controller interrupt. +- clocks : phandle to the Quad SPI clock. +- cdns,fifo-depth : Size of the data FIFO in words. +- cdns,fifo-width: Bus width of the data FIFO in bytes. +- cdns,trigger-address : 32-bit indirect AHB trigger address. + +Optional properties: +- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not. + +Optional subnodes: +Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional +custom properties: +- cdns,read-delay : Delay for read capture logic, in clock cycles +- cdns,tshsl-ns : Delay in nanoseconds for the length that the master mode chip select outputs are de-asserted between transactions. +- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being de-activated and the activation of another. +- cdns,tchsh-ns : Delay in nanoseconds between last bit of current transaction and deasserting the device chip select (qspi_n_ss_out). +- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low and first bit transfer. + +Example: + + qspi: spi@ff705000 { + compatible = "cdns,qspi-nor"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xff705000 0x1000>, + <0xffa00000 0x1000>; + interrupts = <0 151 4>; + clocks = <&qspi_clk>; + cdns,is-decoded-cs; + cdns,fifo-depth = <128>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x00000000>; + + flash0: n25q00@0 { + ... + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + }; + };