From patchwork Wed Jun 10 07:08:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: KOBAYASHI Yoshitake X-Patchwork-Id: 482470 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 25E6D140187 for ; Wed, 10 Jun 2015 17:14:20 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2aBw-0006pO-8T; Wed, 10 Jun 2015 07:12:52 +0000 Received: from imx2.toshiba.co.jp ([106.186.93.51]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2aBt-0006lb-AR; Wed, 10 Jun 2015 07:12:51 +0000 Received: from tsbmgw-mgw02.tsbmgw-mgw02.toshiba.co.jp ([133.199.200.50]) by imx2.toshiba.co.jp with ESMTP id t5A7CGWh029972 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 10 Jun 2015 16:12:16 +0900 (JST) Received: from tsbmgw-mgw02 (localhost [127.0.0.1]) by tsbmgw-mgw02.tsbmgw-mgw02.toshiba.co.jp (8.13.8/8.14.5) with ESMTP id t5A7CF0w021517; Wed, 10 Jun 2015 16:12:15 +0900 Received: from localhost ([127.0.0.1]) by tsbmgw-mgw02 (JAMES SMTP Server 2.3.1) with SMTP ID 614; Wed, 10 Jun 2015 16:12:15 +0900 (JST) Received: from arc1.toshiba.co.jp ([133.199.194.235]) by tsbmgw-mgw02.tsbmgw-mgw02.toshiba.co.jp (8.13.8/8.14.5) with ESMTP id t5A7CF3G021510; Wed, 10 Jun 2015 16:12:15 +0900 Received: (from root@localhost) by arc1.toshiba.co.jp id t5A7CFtV009769; Wed, 10 Jun 2015 16:12:15 +0900 (JST) Received: from unknown [133.199.192.144] by arc1.toshiba.co.jp with ESMTP id SAA09734; Wed, 10 Jun 2015 16:12:13 +0900 Received: from mx.toshiba.co.jp (localhost [127.0.0.1]) by ovp2.toshiba.co.jp with ESMTP id t5A7CD71012103; Wed, 10 Jun 2015 16:12:13 +0900 (JST) Received: from BK2211.rdc.toshiba.co.jp by toshiba.co.jp id t5A7CClW009711; Wed, 10 Jun 2015 16:12:12 +0900 (JST) Received: from island.swc.toshiba.co.jp (localhost [127.0.0.1]) by BK2211.rdc.toshiba.co.jp (8.13.8+Sun/8.13.8) with ESMTP id t5A7CCso006646; Wed, 10 Jun 2015 16:12:12 +0900 (JST) Received: from localhost.localdomain (pftech04 [133.196.122.147]) by island.swc.toshiba.co.jp (Postfix) with ESMTP id 8C47740002; Wed, 10 Jun 2015 16:12:12 +0900 (JST) From: KOBAYASHI Yoshitake To: dwmw2@infradead.org, computersforpeace@gmail.com, linux-mtd@lists.infradead.org Subject: [PATCH] mtd: nand: support for Toshiba BENAND (Built-in ECC NAND) Date: Wed, 10 Jun 2015 16:08:39 +0900 Message-Id: <1433920119-16303-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> X-Mailer: git-send-email 1.7.0.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150610_001249_559775_7928115D X-CRM114-Status: GOOD ( 14.69 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines Cc: linux-kernel@vger.kernel.org, KOBAYASHI Yoshitake X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org This patch enables support for Toshiba BENAND. Toshiba BENAND is a SLC NAND solution that automatically generates ECC inside NAND chip. Newer generation SLC NAND devices of today need multi-bit hardware ECC by NAND controller in SoC. BENAND solution is ECC free, has high performance and backward compatibility in NAND chip trend. Signed-off-by: KOBAYASHI Yoshitake --- drivers/mtd/nand/Kconfig | 16 ++++++++++++++++ drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/nand_base.c | 32 ++++++++++++++++++++++++++++++-- include/linux/mtd/nand.h | 3 +++ 4 files changed, 50 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 5897d8d..2f11d43 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -22,6 +22,22 @@ menuconfig MTD_NAND if MTD_NAND +config MTD_NAND_BENAND + tristate + depends on MTD_NAND_BENAND_ENABLE + default MTD_NAND + +config MTD_NAND_BENAND_ENABLE + bool "Support for Toshiba BENAND (Built-in ECC NAND)" + default y + help + Toshiba BENAND is a SLC NAND solution that automatically + generates ECC inside NAND chip. + Newer generation SLC NAND devices of today need multi-bit + hardware ECC by NAND controller in SoC. + BENAND solution is ECC free, has high performance and + backward compatibility in NAND chip trend. + config MTD_NAND_BCH tristate select BCH diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 582bbd05..afd26f0 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_MTD_NAND) += nand.o +obj-$(CONFIG_MTD_NAND_BENAND) += nand_benand.o obj-$(CONFIG_MTD_NAND_ECC) += nand_ecc.o obj-$(CONFIG_MTD_NAND_BCH) += nand_bch.o obj-$(CONFIG_MTD_NAND_IDS) += nand_ids.o diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index c2e1232..98a8932 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -43,6 +43,7 @@ #include #include #include +#include #include #include #include @@ -3526,8 +3527,17 @@ static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA && nand_is_slc(chip) && (id_data[5] & 0x7) == 0x6 /* 24nm */ && - !(id_data[4] & 0x80) /* !BENAND */) { - mtd->oobsize = 32 * mtd->writesize >> 9; + (id_data[4] & 0x80) /* BENAND */) { + pr_info("24nm BENAND\n"); + + if (IS_ENABLED(CONFIG_MTD_NAND_BENAND)) { + chip->ecc.mode = NAND_ECC_BENAND; + pr_info("Selected BENAND Driver\n"); + } + + } else { + pr_info("24nm SLC NAND\n"); + mtd->oobsize = 32 * mtd->writesize >> 9; /* !BENAND */ } } @@ -4075,6 +4085,24 @@ int nand_scan_tail(struct mtd_info *mtd) } break; + case NAND_ECC_BENAND: + if (!mtd_nand_has_benand()) { + pr_warn("CONFIG_MTD_NAND_BENAND not enabled\n"); + BUG(); + } + ecc->calculate = NULL; + ecc->correct = NULL; + ecc->read_page = nand_read_page_benand; + ecc->read_subpage = nand_read_subpage_benand; + ecc->write_page = nand_write_page_raw; + ecc->read_page_raw = nand_read_page_raw; + ecc->write_page_raw = nand_write_page_raw; + ecc->read_oob = nand_read_oob_std; + ecc->write_oob = nand_write_oob_std; + + nand_benand_init(mtd); + break; + case NAND_ECC_NONE: pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n"); ecc->read_page = nand_read_page_raw; diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 3d4ea7e..8f59ad9 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -101,6 +101,8 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); /* Status bits */ #define NAND_STATUS_FAIL 0x01 #define NAND_STATUS_FAIL_N1 0x02 +/* Recommended to rewrite for BENAND */ +#define NAND_STATUS_RECOM_REWRT 0x08 #define NAND_STATUS_TRUE_READY 0x20 #define NAND_STATUS_READY 0x40 #define NAND_STATUS_WP 0x80 @@ -115,6 +117,7 @@ typedef enum { NAND_ECC_HW_SYNDROME, NAND_ECC_HW_OOB_FIRST, NAND_ECC_SOFT_BCH, + NAND_ECC_BENAND, } nand_ecc_modes_t; /*