| Message ID | 1421419702-17812-2-git-send-email-architt@codeaurora.org |
|---|---|
| State | Superseded |
| Headers | show |
On 01/16/2015 06:48 AM, Archit Taneja wrote: > The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. > Create structs for these clocks so that they can be used by the NAND controller > driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document. > > Cc: Stephen Boyd <sboyd@codeaurora.org> > Signed-off-by: Archit Taneja <architt@codeaurora.org> Looks ok. I couldn't find this used in the downstream sources though. Can you point me to it? I'm mostly worried that this is a shared resource that never should be turned off, so exposing it to drivers may not be the right idea. > +static struct clk_branch ebi2_aon_clk = { > + .hwcg_reg = 0x3b00, > + .hwcg_bit = 6, > + .halt_reg = 0x2fcc, > + .halt_bit = 0, > + .clkr = { > + .enable_reg = 0x3b00, > + .enable_mask = BIT(8), > + .hw.init = &(struct clk_init_data){ > + .name = "ebi2_always_on_clk", > Can this be ebi2_aon_clk to match the macro?
Hi, On 01/17/2015 03:26 AM, Stephen Boyd wrote: > On 01/16/2015 06:48 AM, Archit Taneja wrote: >> The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. >> Create structs for these clocks so that they can be used by the NAND controller >> driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document. >> >> Cc: Stephen Boyd <sboyd@codeaurora.org> >> Signed-off-by: Archit Taneja <architt@codeaurora.org> > > Looks ok. I couldn't find this used in the downstream sources though. > Can you point me to it? I'm mostly worried that this is a shared > resource that never should be turned off, so exposing it to drivers may > not be the right idea. I'll share the sources. > >> +static struct clk_branch ebi2_aon_clk = { >> + .hwcg_reg = 0x3b00, >> + .hwcg_bit = 6, >> + .halt_reg = 0x2fcc, >> + .halt_bit = 0, >> + .clkr = { >> + .enable_reg = 0x3b00, >> + .enable_mask = BIT(8), >> + .hw.init = &(struct clk_init_data){ >> + .name = "ebi2_always_on_clk", >> > > Can this be ebi2_aon_clk to match the macro? > I'll fix this. Thanks, Archit
On 01/16/15 06:48, Archit Taneja wrote: > + > +static struct clk_branch ebi2_aon_clk = { > + .hwcg_reg = 0x3b00, > + .hwcg_bit = 6, It looks like these bits only apply to ebi2_clk, and not ebi2_aon_clk, so these two lines should be dropped. > + .halt_reg = 0x2fcc, > + .halt_bit = 0, > + .clkr = { > + .enable_reg = 0x3b00, > + .enable_mask = BIT(8), > + .hw.init = &(struct clk_init_data){ > + .name = "ebi2_always_on_clk", > + .ops = &clk_branch_ops, > + .flags = CLK_IS_ROOT, > + }, > + }, > +}; >
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index afed5eb..7db54c8 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -2159,6 +2159,38 @@ static struct clk_branch usb_fs1_h_clk = { }, }; +static struct clk_branch ebi2_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 1, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + +static struct clk_branch ebi2_aon_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 0, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(8), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_always_on_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + static struct clk_regmap *gcc_ipq806x_clks[] = { [PLL0] = &pll0.clkr, [PLL0_VOTE] = &pll0_vote, @@ -2261,6 +2293,8 @@ static struct clk_regmap *gcc_ipq806x_clks[] = { [USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr, [USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr, [USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr, + [EBI2_CLK] = &ebi2_clk.clkr, + [EBI2_AON_CLK] = &ebi2_aon_clk.clkr, }; static const struct qcom_reset_map gcc_ipq806x_resets[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h index b857cad..858a47f 100644 --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h @@ -289,5 +289,6 @@ #define UBI32_CORE2_CLK_SRC 278 #define UBI32_CORE1_CLK 279 #define UBI32_CORE2_CLK 280 +#define EBI2_AON_CLK 281 #endif
The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so that they can be used by the NAND controller driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document. Cc: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Archit Taneja <architt@codeaurora.org> --- drivers/clk/qcom/gcc-ipq806x.c | 34 ++++++++++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-ipq806x.h | 1 + 2 files changed, 35 insertions(+)