mtd: pxa3xx_nand: make the driver work on big-endian systems

The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl()
to access I/O registers. However, those functions do not do any
endianness swapping, which means that they won't work when the CPU
runs in big-endian but the I/O registers are little endian, which is
the common situation for ARM systems running big endian.

Since __raw_writel() and __raw_readl() do not include any memory
barriers and the pxa3xx_nand driver can only be compiled for ARM
platforms, the closest I/o accessors functions that do endianess
swapping are writel_relaxed() and readl_relaxed().

This patch has been verified to work on Armada XP GP: without the
patch, the NAND is not detected when the kernel runs big endian while
it is properly detected when the kernel runs little endian. With the
patch applied, the NAND is properly detected in both situations
(little and big endian).

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.13+
---
This patch does not fix a regression introduced by a previous commit,
but is still necessary for stable to allow NAND to work properly on
ARM big endian platforms. The 3.13 starting point was chosen because
the support for big endian on modern ARM systems was added in this
kernel release.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 drivers/mtd/nand/pxa3xx_nand.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

On Thu, May 22, 2014 at 02:56:52PM +0200, Thomas Petazzoni wrote:
> The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl()
> to access I/O registers. However, those functions do not do any
> endianness swapping, which means that they won't work when the CPU
> runs in big-endian but the I/O registers are little endian, which is
> the common situation for ARM systems running big endian.
> 
> Since __raw_writel() and __raw_readl() do not include any memory
> barriers and the pxa3xx_nand driver can only be compiled for ARM
> platforms, the closest I/o accessors functions that do endianess
> swapping are writel_relaxed() and readl_relaxed().

With any luck, the *_relaxed() accessors will be implemented uniformly
on all architectures soon. I believe there's an outstanding patch series
for this out on LKML.

> This patch has been verified to work on Armada XP GP: without the
> patch, the NAND is not detected when the kernel runs big endian while
> it is properly detected when the kernel runs little endian. With the
> patch applied, the NAND is properly detected in both situations
> (little and big endian).
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: <stable@vger.kernel.org> # v3.13+
> ---
> This patch does not fix a regression introduced by a previous commit,
> but is still necessary for stable to allow NAND to work properly on
> ARM big endian platforms. The 3.13 starting point was chosen because
> the support for big endian on modern ARM systems was added in this
> kernel release.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Two sign-offs for the price of one! ;)

Pushed to l2-mtd.git. Thanks!

Brian

> ---
>  drivers/mtd/nand/pxa3xx_nand.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
> index 7588fe2..3003611 100644
> --- a/drivers/mtd/nand/pxa3xx_nand.c
> +++ b/drivers/mtd/nand/pxa3xx_nand.c
> @@ -127,10 +127,10 @@
>  
>  /* macros for registers read/write */
>  #define nand_writel(info, off, val)	\
> -	__raw_writel((val), (info)->mmio_base + (off))
> +	writel_relaxed((val), (info)->mmio_base + (off))
>  
>  #define nand_readl(info, off)		\
> -	__raw_readl((info)->mmio_base + (off))
> +	readl_relaxed((info)->mmio_base + (off))
>  
>  /* error code and state */
>  enum {