From patchwork Wed May 2 00:12:54 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 156274 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id F20D8B6F9D for ; Wed, 2 May 2012 10:15:46 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SPNCB-0000qL-0b; Wed, 02 May 2012 00:13:27 +0000 Received: from mail-pb0-f49.google.com ([209.85.160.49]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SPNC4-0000oh-0K for linux-mtd@lists.infradead.org; Wed, 02 May 2012 00:13:20 +0000 Received: by pbbrq13 with SMTP id rq13so206997pbb.36 for ; Tue, 01 May 2012 17:13:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=Ao1KBa6P+AuqOjXVGRwkNB786Oe5WXz2GhMzIo9QNJI=; b=qKyN5JFX/ExyGlaDOalK32jMgel0XH4s9Ks0BqoPl+BTS19d/L1aPzsGmvBh3Icoio uO6NKG4U6whks0J/ryeIoDTBEZuzGaTO8smefq9ZXkEafystiBdm6G0KPzmqt5H7isYF 29DB9EYL6s60hk8ej7CmsmwTU78OGU+xWRXrzqjXoCSQ/8GzX1aAg8CoGV5lis3c/NtD njJLF1aBUwM4Tsr6uxgeSojPSINwLN3/pBvhzyjZuiR+SHeNe7s4qmPy6j2d+Gl8XwsI iaL8w9sPNcjvH/NGulLqQQO2wZUSYAqCX4ymoWdxaE5qMdcaDdzJ9WnakDQaqEs0pEVf XGNg== Received: by 10.68.134.8 with SMTP id pg8mr14260029pbb.152.1335917599136; Tue, 01 May 2012 17:13:19 -0700 (PDT) Received: from localhost.localdomain (5520-maca-inet1-outside.broadcom.com. [216.31.211.11]) by mx.google.com with ESMTPS id h10sm246271pbh.69.2012.05.01.17.13.17 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 01 May 2012 17:13:18 -0700 (PDT) From: Brian Norris To: Subject: [PATCH 2/3] mtd: nand: remove autoincrement 'sndcmd' code Date: Tue, 1 May 2012 17:12:54 -0700 Message-Id: <1335917575-14953-2-git-send-email-computersforpeace@gmail.com> X-Mailer: git-send-email 1.7.5.4.2.g519b1 In-Reply-To: <1335917575-14953-1-git-send-email-computersforpeace@gmail.com> References: <1335917575-14953-1-git-send-email-computersforpeace@gmail.com> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.49 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (computersforpeace[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Scott Wood , Brian Norris , David Woodhouse , Shmulik Ladkani , Artem Bityutskiy X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The NAND_NO_AUTOINCR option is always set, so we will kill the option and make "no autoincrement" the default behavior for nand_base.c. Thus, we should remove the code which decides whether or not to send the NAND_CMD_READ0 command. Instead, we unconditionally send the command. Signed-off-by: Brian Norris --- drivers/mtd/nand/nand_base.c | 43 +++++------------------------------------ 1 files changed, 6 insertions(+), 37 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 640f1f8..6246b0f 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -1477,8 +1477,6 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, int chipnr, page, realpage, col, bytes, aligned; struct nand_chip *chip = mtd->priv; struct mtd_ecc_stats stats; - int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; - int sndcmd = 1; int ret = 0; uint32_t readlen = ops->len; uint32_t oobreadlen = ops->ooblen; @@ -1509,10 +1507,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, if (realpage != chip->pagebuf || oob) { bufpoi = aligned ? buf : chip->buffers->databuf; - if (likely(sndcmd)) { - chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); - sndcmd = 0; - } + chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); /* * Now read the page into the buffer. Absent an error, @@ -1564,13 +1559,7 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, } if (!(chip->options & NAND_NO_READRDY)) { - /* - * Apply delay or wait for ready/busy pin. Do - * this before the AUTOINCR check, so no - * problems arise if a chip which does auto - * increment is marked as NOAUTOINCR by the - * board driver. - */ + /* Apply delay or wait for ready/busy pin */ if (!chip->dev_ready) udelay(chip->chip_delay); else @@ -1600,13 +1589,6 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, chip->select_chip(mtd, -1); chip->select_chip(mtd, chipnr); } - - /* - * Check, if the chip supports auto page increment or if we - * have hit a block boundary. - */ - if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) - sndcmd = 1; } ops->retlen = ops->len - (size_t) readlen; @@ -1800,10 +1782,9 @@ static int nand_write_oob_syndrome(struct mtd_info *mtd, static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops) { - int page, realpage, chipnr, sndcmd = 1; + int page, realpage, chipnr; struct nand_chip *chip = mtd->priv; struct mtd_ecc_stats stats; - int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; int readlen = ops->ooblen; int len; uint8_t *buf = ops->oobbuf; @@ -1842,20 +1823,15 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, while (1) { if (ops->mode == MTD_OPS_RAW) - sndcmd = chip->ecc.read_oob_raw(mtd, chip, page, sndcmd); + chip->ecc.read_oob_raw(mtd, chip, page, 1); else - sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd); + chip->ecc.read_oob(mtd, chip, page, 1); len = min(len, readlen); buf = nand_transfer_oob(chip, buf, ops, len); if (!(chip->options & NAND_NO_READRDY)) { - /* - * Apply delay or wait for ready/busy pin. Do this - * before the AUTOINCR check, so no problems arise if a - * chip which does auto increment is marked as - * NOAUTOINCR by the board driver. - */ + /* Apply delay or wait for ready/busy pin */ if (!chip->dev_ready) udelay(chip->chip_delay); else @@ -1876,13 +1852,6 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, chip->select_chip(mtd, -1); chip->select_chip(mtd, chipnr); } - - /* - * Check, if the chip supports auto page increment or if we - * have hit a block boundary. - */ - if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) - sndcmd = 1; } ops->oobretlen = ops->ooblen;