From patchwork Fri Oct 28 05:40:02 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: b35362@freescale.com X-Patchwork-Id: 122351 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 6809E1007DB for ; Fri, 28 Oct 2011 17:52:32 +1100 (EST) Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1RJgIR-0004NJ-Hx; Fri, 28 Oct 2011 06:52:07 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RJgIR-0001lg-AD; Fri, 28 Oct 2011 06:52:07 +0000 Received: from am1ehsobe003.messaging.microsoft.com ([213.199.154.206] helo=AM1EHSOBE003.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1RJgIJ-0001jw-At for linux-mtd@lists.infradead.org; Fri, 28 Oct 2011 06:52:00 +0000 Received: from mail48-am1-R.bigfish.com (10.3.201.244) by AM1EHSOBE003.bigfish.com (10.3.204.23) with Microsoft SMTP Server id 14.1.225.22; Fri, 28 Oct 2011 06:51:49 +0000 Received: from mail48-am1 (localhost.localdomain [127.0.0.1]) by mail48-am1-R.bigfish.com (Postfix) with ESMTP id 94FC2AB0351; Fri, 28 Oct 2011 06:51:53 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-FB-SS: 0, Received: from mail48-am1 (localhost.localdomain [127.0.0.1]) by mail48-am1 (MessageSwitch) id 1319784705544245_17093; Fri, 28 Oct 2011 06:51:45 +0000 (UTC) Received: from AM1EHSMHS014.bigfish.com (unknown [10.3.201.252]) by mail48-am1.bigfish.com (Postfix) with ESMTP id 7F1C81930059; Fri, 28 Oct 2011 06:51:45 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS014.bigfish.com (10.3.207.152) with Microsoft SMTP Server (TLS) id 14.1.225.22; Fri, 28 Oct 2011 06:51:38 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.339.2; Fri, 28 Oct 2011 01:51:45 -0500 Received: from localhost (rock.ap.freescale.net [10.193.20.106]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p9S6phm1000235; Fri, 28 Oct 2011 01:51:44 -0500 (CDT) From: To: , Subject: [PATCH] mtd/nand : set Nand flash page address to FBAR and FPAR correctly Date: Fri, 28 Oct 2011 13:40:02 +0800 Message-ID: <1319780403-8680-2-git-send-email-b35362@freescale.com> X-Mailer: git-send-email 1.6.4 In-Reply-To: <1319780403-8680-1-git-send-email-b35362@freescale.com> References: <1319780403-8680-1-git-send-email-b35362@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20111028_025159_639838_57501D15 X-CRM114-Status: GOOD ( 13.71 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [213.199.154.206 listed in list.dnswl.org] Cc: linux-mtd@lists.infradead.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Liu Shuo If we use the Nand flash chip whose number of pages in a block is greater than 64(for large page), we must treat the low bit of FBAR as being the high bit of the page address due to the limitation of FCM, it simply uses the low 6-bits (for large page) of the combined block/page address as the FPAR component, rather than considering the actual block size. Signed-off-by: Liu Shuo Signed-off-by: Jerry Huang Signed-off-by: Tang Yuantian Signed-off-by: Li Yang --- drivers/mtd/nand/fsl_elbc_nand.c | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 33d8aad..681d8c5 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -167,15 +167,22 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) elbc_fcm_ctrl->page = page_addr; - out_be32(&lbc->fbar, - page_addr >> (chip->phys_erase_shift - chip->page_shift)); - if (priv->page_size) { + /* + * large page size chip : FPAR[PI] save the lowest 6 bits, + * FBAR[BLK] save the other bits. + */ + out_be32(&lbc->fbar, page_addr >> 6); out_be32(&lbc->fpar, ((page_addr << FPAR_LP_PI_SHIFT) & FPAR_LP_PI) | (oob ? FPAR_LP_MS : 0) | column); buf_num = (page_addr & 1) << 2; } else { + /* + * small page size chip : FPAR[PI] save the lowest 5 bits, + * FBAR[BLK] save the other bits. + */ + out_be32(&lbc->fbar, page_addr >> 5); out_be32(&lbc->fpar, ((page_addr << FPAR_SP_PI_SHIFT) & FPAR_SP_PI) | (oob ? FPAR_SP_MS : 0) | column);