From patchwork Tue Mar 17 09:12:20 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfgang Grandegger X-Patchwork-Id: 24552 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2810CDDE25 for ; Tue, 17 Mar 2009 20:33:39 +1100 (EST) Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1LjVc9-0004Mu-KJ; Tue, 17 Mar 2009 09:29:37 +0000 Received: from mail-out.m-online.net ([212.18.0.9]) by bombadil.infradead.org with esmtp (Exim 4.69 #1 (Red Hat Linux)) id 1LjVM2-0002tE-DY for linux-mtd@lists.infradead.org; Tue, 17 Mar 2009 09:13:05 +0000 Received: from mail01.m-online.net (mail.m-online.net [192.168.3.149]) by mail-out.m-online.net (Postfix) with ESMTP id 9DFF01C1540F; Tue, 17 Mar 2009 10:14:23 +0100 (CET) X-Auth-Info: gG19L7X7d07TMzg1Twt3YUxRSvoh3wgpKRiouFpRmAY= Received: from localhost.localdomain (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTP id 971BE90284; Tue, 17 Mar 2009 10:12:30 +0100 (CET) From: Wolfgang Grandegegr To: linux-mtd@lists.infradead.org Subject: [PATCH 2/4] NAND: FSL-UPM: add support for selecting chips via MAR Date: Tue, 17 Mar 2009 10:12:20 +0100 Message-Id: <1237281143-8768-3-git-send-email-wg@grandegger.com> X-Mailer: git-send-email 1.5.6.6 In-Reply-To: <1237281143-8768-2-git-send-email-wg@grandegger.com> References: <1237281143-8768-1-git-send-email-wg@grandegger.com> <1237281143-8768-2-git-send-email-wg@grandegger.com> X-Bad-Reply: References and In-Reply-To but no 'Re:' in Subject. X-Spam-Score: 0.0 (/) X-Mailman-Approved-At: Tue, 17 Mar 2009 05:29:34 -0400 Cc: linuxppc-dev@ozlabs.org, Anton Vorontsov , Wolfgang Grandegger X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Wolfgang Grandegger For the NAND chips on the TQM8548 modules, a special chip-select logic is used. It uses dedicated address lines to be set via UPM machine address register (mar). This patch also adds that support to the FSL-UPM driver. Signed-off-by: Wolfgang Grandegger --- arch/powerpc/sysdev/fsl_lbc.c | 2 +- drivers/mtd/nand/fsl_upm.c | 13 ++++++++++++- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c index 0494ee5..dceb8d1 100644 --- a/arch/powerpc/sysdev/fsl_lbc.c +++ b/arch/powerpc/sysdev/fsl_lbc.c @@ -150,7 +150,7 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) spin_lock_irqsave(&fsl_lbc_lock, flags); - out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width)); + out_be32(&fsl_lbc_regs->mar, mar); switch (upm->width) { case 8: diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index ca7e85a..f42955c 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -37,6 +37,7 @@ struct fsl_upm_nand { struct fsl_upm upm; uint8_t upm_addr_offset; uint8_t upm_cmd_offset; + uint32_t upm_mar_chip_offset; void __iomem *io_base; int rnb_gpio[FSL_UPM_NAND_MAX_CHIPS]; int chip_delay; @@ -74,7 +75,9 @@ static void fun_wait_rnb(struct fsl_upm_nand *fun) static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { + struct nand_chip *chip = mtd->priv; struct fsl_upm_nand *fun = to_fsl_upm_nand(mtd); + u32 mar; if (!(ctrl & fun->last_ctrl)) { fsl_upm_end_pattern(&fun->upm); @@ -92,7 +95,11 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset); } - fsl_upm_run_pattern(&fun->upm, fun->io_base, cmd); + mar = cmd << (32 - fun->upm.width); + if (fun->upm_mar_chip_offset && fun->chip_number > 0) { + mar |= fun->chip_number * fun->upm_mar_chip_offset; + } + fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar); fun_wait_rnb(fun); } @@ -244,6 +251,10 @@ static int __devinit fun_probe(struct of_device *ofdev, } fun->upm_cmd_offset = *prop; + prop = of_get_property(ofdev->node, "fsl,upm-mar-chip-offset", &size); + if (prop && size == sizeof(uint32_t)) + fun->upm_mar_chip_offset = *prop; + prop = of_get_property(ofdev->node, "max-chips", &size); if (prop && size == sizeof(uint32_t)) { fun->max_chips = *prop;