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[v8,0/9] Add octal DTR support for Macronix flash

Message ID 20240201094353.33281-1-jaimeliao.tw@gmail.com
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Series Add octal DTR support for Macronix flash | expand

Message

liao jaime Feb. 1, 2024, 9:43 a.m. UTC 
From: JaimeLiao <jaimeliao@mxic.com.tw>

Add method for Macronix Octal DTR Eable/Disable.
Merge Tudor's patch "Allow specifying the byte order in DTR mode"
Add support for Macronix flash

v8:
  Supplement missing S-o-b
  Remove function spi_nor_is_octal_dtr_swab16
  Split IDs by MX25 & MX66
  Add dump of capability in debugfs
  Add dump of params in debugfs
  Add dump of reult for mtd-utils tests
  Add SNOR_ID(0xC2) in last of Macronix ID table

v7:
  Add dtr_swab16 judgement to enable/disable Macronix xSPI host
  controller swap byte feature.

v6:
  Add byte swap support for spi-mxic.c
  Remove flash name in ID table.

v5:
  Remove manufacturer read id function.
  For increased readability, separate Flash IDs based on whether
  it supports RWW feature.

v4:
  Add patch for adding manufacturer read id function.
  remove patch "hook manufacturer by checking first byte id"

v3:
  Add patch for hook manufacturer by comparing ID 1st byte.
  Add patches for specifying the byte order in DTR mode by merging
  Tudor's patch.

v2:
  Following exsting rules to re-create Macronix specify Octal DTR method.
  change signature to jaimeliao@mxic.com.tw
  Clear sector size information in flash INFO.

JaimeLiao (9):
  mtd: spi-nor: add Octal DTR support for Macronix flash
  spi: spi-mem: Allow specifying the byte order in Octal DTR mode
  mtd: spi-nor: core: Allow specifying the byte order in Octal DTR mode
  mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT
  spi: mxic: Add support for swapping byte
  mtd: spi-nor: add support for Macronix Octal flash MX25 series with
    RWW feature
  mtd: spi-nor: add support for Macronix Octal flash MX66 series with
    RWW feature
  mtd: spi-nor: add support for Macronix Octal flash MX25 series
  mtd: spi-nor: add support for Macronix Octal flash MX66 series

 drivers/mtd/spi-nor/core.c     |   5 +
 drivers/mtd/spi-nor/core.h     |   1 +
 drivers/mtd/spi-nor/macronix.c | 169 +++++++++++++++++++++++++++++++++
 drivers/mtd/spi-nor/sfdp.c     |   4 +
 drivers/mtd/spi-nor/sfdp.h     |   1 +
 drivers/spi/spi-mem.c          |   4 +
 drivers/spi/spi-mxic.c         |  17 +++-
 include/linux/spi/spi-mem.h    |   6 ++
 8 files changed, 203 insertions(+), 4 deletions(-)

Comments

Tudor Ambarus Feb. 22, 2024, 9:32 a.m. UTC | #1 
Jaime,

You're so close to have these integrated, I see there are no major
comments for the patch set. Would you please address the comments and
re-submit?

I plan to do the PR next Monday.

ta
liao jaime Feb. 22, 2024, 9:55 a.m. UTC | #2 
Hi Tudor


>
> Jaime,
>
> You're so close to have these integrated, I see there are no major
> comments for the patch set. Would you please address the comments and
> re-submit?
This patchset would be take over by Alvin.
Thank you for always giving useful and kind advice.

>
> I plan to do the PR next Monday.
>
> ta

Thanks
Jaime
Alvin Zhou Feb. 26, 2024, 2:02 a.m. UTC | #3 
Hi Tudor,

>
> Hi Tudor
>
>
> >
> > Jaime,
> >
> > You're so close to have these integrated, I see there are no major
> > comments for the patch set. Would you please address the comments and
> > re-submit?
> This patchset would be take over by Alvin.
> Thank you for always giving useful and kind advice.
>
> >
> > I plan to do the PR next Monday.
Because I just received the patchwork from Jaime, so I need to spend
some time studying the comments to prepare for the next PR.
Thank you for your understanding.
> >
> > ta
>
> Thanks
> Jaime

Thanks
Alvin