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[v6,0/4] mtd: spi-nor: otp: 4 byte mode fix and erase support

Message ID 20210607112744.21587-1-michael@walle.cc
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Series mtd: spi-nor: otp: 4 byte mode fix and erase support | expand

Message

Michael Walle June 7, 2021, 11:27 a.m. UTC
This series is the follow up on the single patch
mtd: spi-nor: implement OTP erase for Winbond and similar flashes

Pratyush Yadav discovered a likely problem with bigger flashes, the address
to access the security registers is either 3 or 4 byte (at least for
winbond flashes).

Changes since v5:
 - squash new patch into "Fixes:" patch

Changes since v4:
 - add new patch to get rid taking the spi lock if length is zero. Please
   note, that I didn't squash this into the "Fixes:" patch because it is
   unrelated to the actual bug.
 - add comment which explains that we could also branch on an error in
   spi_nor_mtd_otp_range_is_locked()
 - check zero length in spi_nor_mtd_otp_erase() and return early before
   taking the lock

Changes since v3:
 - new patch to check for read-only OTP regions before writing
 - clarify term "security register"
 - don't combine lock and erase functions anymore. there are now
   more difference than similarities.

Changes since v2:
 - fix 3/4 byte mode access
 - use spi_nor_erase_sector() by swapping the nor->erase_opcode
 - use more consistent wording regarding the security registers

Changes since v1:
- fixed kernel doc

Michael Walle (4):
  mtd: spi-nor: otp: fix access to security registers in 4 byte mode
  mtd: spi-nor: otp: use more consistent wording
  mtd: spi-nor: otp: return -EROFS if region is read-only
  mtd: spi-nor: otp: implement erase for Winbond and similar flashes

 drivers/mtd/spi-nor/core.c    |   2 +-
 drivers/mtd/spi-nor/core.h    |   4 +
 drivers/mtd/spi-nor/otp.c     | 156 +++++++++++++++++++++++++++++++---
 drivers/mtd/spi-nor/winbond.c |   1 +
 4 files changed, 149 insertions(+), 14 deletions(-)

Comments

Raghavendra, Vignesh June 11, 2021, 11:57 a.m. UTC | #1
On Mon, 7 Jun 2021 13:27:40 +0200, Michael Walle wrote:
> This series is the follow up on the single patch
> mtd: spi-nor: implement OTP erase for Winbond and similar flashes
> 
> Pratyush Yadav discovered a likely problem with bigger flashes, the address
> to access the security registers is either 3 or 4 byte (at least for
> winbond flashes).
> 
> [...]

Applied to spi-nor/next, thanks!
[1/4] mtd: spi-nor: otp: fix access to security registers in 4 byte mode
      https://git.kernel.org/mtd/c/b97b1a7698
[2/4] mtd: spi-nor: otp: use more consistent wording
      https://git.kernel.org/mtd/c/d5b813e484
[3/4] mtd: spi-nor: otp: return -EROFS if region is read-only
      https://git.kernel.org/mtd/c/388161ca45
[4/4] mtd: spi-nor: otp: implement erase for Winbond and similar flashes
      https://git.kernel.org/mtd/c/c6ec3e1e3a

--
Regards
Vignesh