mbox series

[RFC,v4,0/8] Add Rockchip SFC(serial flash controller) support

Message ID 20210604151055.28636-1-macroalpha82@gmail.com
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Series Add Rockchip SFC(serial flash controller) support | expand


Chris Morgan June 4, 2021, 3:10 p.m. UTC
From: Chris Morgan <macromorgan@hotmail.com>

I'm trying to revive an abandoned patch series for the Rockchip serial
flash controller (SFC) found on the Rockchip PX30 SOC, as well as other
SOCs by Rockchip. I'm picking this up from version 8 of the patch
series located from here:


Changes made in v4:
 - Changing patch back to an "RFC". An engineer from Rockchip
   reached out to me to let me know they are working on this patch for
   upstream, I am submitting this v4 for the community to see however
   I expect Jon Lin (jon.lin@rock-chips.com) will submit new patches
   soon and these are the ones we should pursue for mainlining. Jon's
   patch series should include support for more hardware than this
 - Clean up documentation more and ensure it is correct per
   make dt_binding_check.
 - Add support in device trees for rk3036, rk3308, and rv1108.
 - Add ahb clock (hclk_sfc) support for rk3036.
 - Change rockchip_sfc_wait_fifo_ready() to use a switch statement.
 - Change IRQ code to only mark IRQ as handled if it handles the
   specific IRQ (DMA transfer finish) it is supposed to handle.

Changes made in v3:
 - Changed the name of the clocks to sfc/ahb (from clk-sfc/clk-hsfc).
 - Changed the compatible string from rockchip,sfc to
   rockchip,rk3036-sfc. A quick glance at the datasheets suggests this
   driver should work for the PX30, RK180x, RK3036, RK312x, RK3308 and
   RV1108 SoCs, and possibly more. However, I am currently only able
   to test this on a PX30 (an RK3326). The technical reference manuals
   appear to list the same registers for each device.
 - Corrected devicetree documentation for formatting and to note these
 - Replaced the maintainer with Heiko Stuebner and myself, as we will
   take ownership of this going forward.
 - Noted that the device (per the reference manual) supports 4 CS, but
   I am only able to test a single CS (CS 0).
 - Reordered patches to comply with upstream rules.

Changes made in v2:
 - Reimplemented driver using spi-mem subsystem.
 - Removed power management code as I couldn't get it working properly.
 - Added device tree bindings for Odroid Go Advance.

Changes made in this new series versus the v8 of the old series:
 - Added function to read spi-rx-bus-width from device tree, in the
   event that the SPI chip supports 4x mode but only has 2 pins
   wired (such as the Odroid Go Advance).
 - Changed device tree documentation from txt to yaml format.
 - Made "reset" message a dev_dbg from a dev_info.
 - Changed read and write fifo functions to remove redundant checks.
 - Changed the write and read from relaxed to non-relaxed when
   starting the DMA transfer or reading the DMA IRQ.
 - Changed from dma_coerce_mask_and_coherent to just
 - Changed name of get_if_type to rockchip_sfc_get_if_type.

Chris Morgan (8):
  dt-bindings: rockchip-sfc: Bindings for Rockchip serial flash
  spi: rockchip-sfc: add rockchip serial flash controller
  arm64: dts: rockchip: Add SFC to PX30
  clk: rockchip: Add support for hclk_sfc on rk3036
  arm: dts: rockchip: Add SFC to RK3036
  arm: dts: rockchip: Add SFC to RV1108
  arm64: dts: rockchip: Add SFC to RK3308
  arm64: dts: rockchip: Enable SFC for Odroid Go Advance

 .../devicetree/bindings/spi/rockchip-sfc.yaml |  85 ++
 arch/arm/boot/dts/rk3036.dtsi                 |  42 +
 arch/arm/boot/dts/rv1108.dtsi                 |  37 +
 arch/arm64/boot/dts/rockchip/px30.dtsi        |  38 +
 arch/arm64/boot/dts/rockchip/rk3308.dtsi      |  37 +
 .../boot/dts/rockchip/rk3326-odroid-go2.dts   |  16 +
 drivers/clk/rockchip/clk-rk3036.c             |   2 +-
 drivers/spi/Kconfig                           |   9 +
 drivers/spi/Makefile                          |   1 +
 drivers/spi/spi-rockchip-sfc.c                | 863 ++++++++++++++++++
 include/dt-bindings/clock/rk3036-cru.h        |   1 +
 11 files changed, 1130 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/spi/rockchip-sfc.yaml
 create mode 100644 drivers/spi/spi-rockchip-sfc.c