| Message ID | 20190417121420.21752-1-frieder.schrempf@kontron.de |
|---|---|
| Headers | show |
| Series | mtd: rawnand: Support bad block markers in first, second or last page | expand |
Please forget about this, I forgot to squash the fixes for patch 5. I will send a new version. Sorry! On 17.04.19 14:15, Schrempf Frieder wrote: > From: Frieder Schrempf <frieder.schrempf@kontron.de> > > Currently supported bad block marker positions within the block are: > * in first page only > * in last page only > * in first or second page > > After some cleanup and preparation in patches 1 to 4 we make it > possible to set NAND_BBM_FIRSTPAGE, NAND_BBM_SECONDPAGE and > NAND_BBM_LASTPAGE independently of each other (patch 5). > > Some ESMT NANDs are known to have been shipped by the manufacturer > with bad block markers in the first or last page, instead of the > first or second page. > > Also the datasheets for Cypress/Spansion/AMD NANDs claim that the > first, second *and* last page needs to be checked. > > Therefore in patch 6 and 7 we set all three flags for > AMD/Spansion/Cypress and ESMT chips. > --- > Changes in v5: > ============== > * Rebase onto current nand/next > * Fix nand_bbm_get_next_page() docs > * Use inclusive values for start page in nand_bbm_get_next_page() > * Return -EINVAL from nand_bbm_get_next_page() when no more pages are available > * Improve code style in nand_block_bad() > * Add parentheses in scan_block_fast() and nand_default_block_markbad() > * Unsign badblockpos field in struct nand_chip and struct onenand_chip > * Add R-b tags > > Changes in v4: > ============== > * Move onenand changes to separate patch > * Add missing badblockpos field to onenand_chip struct > * Move cleanup of badblockpos field and flags to separate patch > * Move assignemnt of badblockpos from onenand_bbt.c to onenand_base.c > * Fix incorrect usage of bbt_options in nand_bbt.c > * Add R-b tags > > Changes in v3: > ============== > * Fix bit offsets for new flags in nand_chip->options > * Move separation of flags for first and second page markers to a > separate patch > * Fix cover letter > * Fix S-o-b tag > * Add R-b tags > > Changes in v2: > ============== > * Rebase on 5.0-rc1 > * Add patch to move bad block marker position info to a common place and > rename/prepare existing flags > * improve/rename function nand_bbm_get_next_page() to use new flags > --- > Frieder Schrempf (7): > mtd: rawnand: Always store info about bad block markers in chip struct > mtd: onenand: Store bad block marker position in chip struct > mtd: nand: Cleanup flags and fields for bad block marker position > mtd: nand: Make flags for bad block marker position more granular > mtd: rawnand: Support bad block markers in first, second or last page > mtd: rawnand: ESMT: Also use the last page for bad block markers > mtd: rawnand: AMD: Also use the last page for bad block markers > > drivers/mtd/nand/onenand/onenand_base.c | 5 +- > drivers/mtd/nand/onenand/onenand_bbt.c | 3 -- > drivers/mtd/nand/raw/internals.h | 1 + > drivers/mtd/nand/raw/nand_amd.c | 8 +++- > drivers/mtd/nand/raw/nand_base.c | 64 +++++++++++++++++-------- > drivers/mtd/nand/raw/nand_bbt.c | 28 +++++------ > drivers/mtd/nand/raw/nand_esmt.c | 9 +++- > drivers/mtd/nand/raw/nand_hynix.c | 4 +- > drivers/mtd/nand/raw/nand_macronix.c | 2 +- > drivers/mtd/nand/raw/nand_micron.c | 2 +- > drivers/mtd/nand/raw/nand_samsung.c | 4 +- > drivers/mtd/nand/raw/nand_toshiba.c | 2 +- > drivers/mtd/nand/raw/sh_flctl.c | 4 +- > include/linux/mtd/bbm.h | 14 +----- > include/linux/mtd/onenand.h | 3 ++ > include/linux/mtd/rawnand.h | 17 ++++++- > 16 files changed, 105 insertions(+), 65 deletions(-) >
From: Frieder Schrempf <frieder.schrempf@kontron.de> Currently supported bad block marker positions within the block are: * in first page only * in last page only * in first or second page After some cleanup and preparation in patches 1 to 4 we make it possible to set NAND_BBM_FIRSTPAGE, NAND_BBM_SECONDPAGE and NAND_BBM_LASTPAGE independently of each other (patch 5). Some ESMT NANDs are known to have been shipped by the manufacturer with bad block markers in the first or last page, instead of the first or second page. Also the datasheets for Cypress/Spansion/AMD NANDs claim that the first, second *and* last page needs to be checked. Therefore in patch 6 and 7 we set all three flags for AMD/Spansion/Cypress and ESMT chips. --- Changes in v5: ============== * Rebase onto current nand/next * Fix nand_bbm_get_next_page() docs * Use inclusive values for start page in nand_bbm_get_next_page() * Return -EINVAL from nand_bbm_get_next_page() when no more pages are available * Improve code style in nand_block_bad() * Add parentheses in scan_block_fast() and nand_default_block_markbad() * Unsign badblockpos field in struct nand_chip and struct onenand_chip * Add R-b tags Changes in v4: ============== * Move onenand changes to separate patch * Add missing badblockpos field to onenand_chip struct * Move cleanup of badblockpos field and flags to separate patch * Move assignemnt of badblockpos from onenand_bbt.c to onenand_base.c * Fix incorrect usage of bbt_options in nand_bbt.c * Add R-b tags Changes in v3: ============== * Fix bit offsets for new flags in nand_chip->options * Move separation of flags for first and second page markers to a separate patch * Fix cover letter * Fix S-o-b tag * Add R-b tags Changes in v2: ============== * Rebase on 5.0-rc1 * Add patch to move bad block marker position info to a common place and rename/prepare existing flags * improve/rename function nand_bbm_get_next_page() to use new flags --- Frieder Schrempf (7): mtd: rawnand: Always store info about bad block markers in chip struct mtd: onenand: Store bad block marker position in chip struct mtd: nand: Cleanup flags and fields for bad block marker position mtd: nand: Make flags for bad block marker position more granular mtd: rawnand: Support bad block markers in first, second or last page mtd: rawnand: ESMT: Also use the last page for bad block markers mtd: rawnand: AMD: Also use the last page for bad block markers drivers/mtd/nand/onenand/onenand_base.c | 5 +- drivers/mtd/nand/onenand/onenand_bbt.c | 3 -- drivers/mtd/nand/raw/internals.h | 1 + drivers/mtd/nand/raw/nand_amd.c | 8 +++- drivers/mtd/nand/raw/nand_base.c | 64 +++++++++++++++++-------- drivers/mtd/nand/raw/nand_bbt.c | 28 +++++------ drivers/mtd/nand/raw/nand_esmt.c | 9 +++- drivers/mtd/nand/raw/nand_hynix.c | 4 +- drivers/mtd/nand/raw/nand_macronix.c | 2 +- drivers/mtd/nand/raw/nand_micron.c | 2 +- drivers/mtd/nand/raw/nand_samsung.c | 4 +- drivers/mtd/nand/raw/nand_toshiba.c | 2 +- drivers/mtd/nand/raw/sh_flctl.c | 4 +- include/linux/mtd/bbm.h | 14 +----- include/linux/mtd/onenand.h | 3 ++ include/linux/mtd/rawnand.h | 17 ++++++- 16 files changed, 105 insertions(+), 65 deletions(-)