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[GIT,PULL] clk: samsung: drivers for v6.4

Message ID 20230403163106.331712-1-krzysztof.kozlowski@linaro.org
State New
Headers show
Series [GIT,PULL] clk: samsung: drivers for v6.4 | expand

Pull-request

https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-clk-6.4

Message

Krzysztof Kozlowski April 3, 2023, 4:31 p.m. UTC
The following changes since commit fe15c26ee26efa11741a7b632e9f23b01aca4cc6:

  Linux 6.3-rc1 (2023-03-05 14:52:03 -0800)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-clk-6.4

for you to fetch changes up to babb3e6a8a8e5a61a65d4463610108808139b23e:

  clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical (2023-03-13 08:24:57 +0100)

----------------------------------------------------------------
Samsung SoC clock drivers changes for 6.4

1. Exynos850: Add CMU_G3D clock controller for the Mali GPU.  This
   brings new PLLs and few cleanups/simplifications in core Exynos clock
   controller code, so they can be easier re-used in Exynos850 clock
   controller driver.
   New CMU_G3D clock controller needs Devicetree bindings header changes
   with clock indices which are pulled from Samsung SoC repository.

2. Extract Exynos5433 (ARM64) clock controller power management code to
   common driver parts, so later it can be re-used by other Exynos clock
   controller drivers.  This only prepares for such re-usage, which is
   expected to come later for Exynos850.

3. Exynos850: make PMU_ALIVE_PCLK clock critical, because it is needed
   for core block - Power Management Unit.

4. Cleanup: remove() callback returns void.

----------------------------------------------------------------
Krzysztof Kozlowski (1):
      Merge branch 'for-v6.4/clk-exynos850-dt-binding' into next/clk

Sam Protsenko (12):
      dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
      dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
      clk: samsung: Remove np argument from samsung_clk_init()
      clk: samsung: Don't pass reg_base to samsung_clk_register_pll()
      clk: samsung: Set dev in samsung_clk_init()
      clk: samsung: clk-pll: Implement pll0818x PLL type
      clk: samsung: exynos850: Implement CMU_G3D domain
      clk: samsung: exynos850: Add AUD and HSI main gate clocks
      clk: samsung: Extract clocks registration to common function
      clk: samsung: Extract parent clock enabling to common function
      clk: samsung: exynos5433: Extract PM support to common ARM64 layer
      clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical

Uwe Kleine-K├Ânig (1):
      clk: samsung: Convert to platform remove callback returning void

 .../bindings/clock/samsung,exynos850-clock.yaml    |  19 ++
 drivers/clk/samsung/clk-exynos-arm64.c             | 229 +++++++++++++++++++--
 drivers/clk/samsung/clk-exynos-arm64.h             |   3 +
 drivers/clk/samsung/clk-exynos-audss.c             |   6 +-
 drivers/clk/samsung/clk-exynos-clkout.c            |   6 +-
 drivers/clk/samsung/clk-exynos4.c                  |   6 +-
 drivers/clk/samsung/clk-exynos4412-isp.c           |   3 +-
 drivers/clk/samsung/clk-exynos5250.c               |   5 +-
 drivers/clk/samsung/clk-exynos5420.c               |   5 +-
 drivers/clk/samsung/clk-exynos5433.c               | 157 +-------------
 drivers/clk/samsung/clk-exynos850.c                | 141 ++++++++++++-
 drivers/clk/samsung/clk-pll.c                      |  12 +-
 drivers/clk/samsung/clk-pll.h                      |   1 +
 drivers/clk/samsung/clk-s3c64xx.c                  |   4 +-
 drivers/clk/samsung/clk-s5pv210.c                  |   6 +-
 drivers/clk/samsung/clk.c                          |  64 ++++--
 drivers/clk/samsung/clk.h                          |  10 +-
 include/dt-bindings/clock/exynos850.h              |  28 ++-
 18 files changed, 475 insertions(+), 230 deletions(-)