From patchwork Mon Sep 1 01:13:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 384604 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id CCE5914008C for ; Mon, 1 Sep 2014 11:17:05 +1000 (EST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XOGCS-0003Tc-Iw; Mon, 01 Sep 2014 01:14:28 +0000 Received: from dns-bn1lp0143.outbound.protection.outlook.com ([207.46.163.143] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XOGCQ-0003Qr-Bi for linux-arm-kernel@lists.infradead.org; Mon, 01 Sep 2014 01:14:27 +0000 Received: from BY2PR03CA042.namprd03.prod.outlook.com (10.141.249.15) by DM2PR03MB573.namprd03.prod.outlook.com (10.141.83.28) with Microsoft SMTP Server (TLS) id 15.0.1010.18; Mon, 1 Sep 2014 01:14:03 +0000 Received: from BN1AFFO11FD045.protection.gbl (2a01:111:f400:7c10::132) by BY2PR03CA042.outlook.office365.com (2a01:111:e400:2c5d::15) with Microsoft SMTP Server (TLS) id 15.0.1019.16 via Frontend Transport; Mon, 1 Sep 2014 01:14:02 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1AFFO11FD045.mail.protection.outlook.com (10.58.53.60) with Microsoft SMTP Server (TLS) id 15.0.1010.11 via Frontend Transport; Mon, 1 Sep 2014 01:14:02 +0000 Received: from dragon ([10.192.185.1]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s811Dxpe027804; Sun, 31 Aug 2014 18:14:00 -0700 Date: Mon, 1 Sep 2014 09:13:52 +0800 From: Shawn Guo To: Subject: Re: [PATCH] ARM: imx: remove imx_scu_standby_enable() Message-ID: <20140901011351.GD3135@dragon> References: <1409533338-4111-1-git-send-email-shawn.guo@freescale.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1409533338-4111-1-git-send-email-shawn.guo@freescale.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(51704005)(189002)(199003)(24454002)(104016003)(44976005)(33716001)(92726001)(87936001)(97756001)(68736004)(90102001)(79102001)(83322001)(23726002)(105606002)(20776003)(6806004)(84676001)(50466002)(106466001)(81542001)(81156004)(110136001)(77982001)(102836001)(95666004)(74662001)(46406003)(33656002)(85852003)(31966008)(83072002)(80022001)(86362001)(64706001)(54356999)(50986999)(21056001)(19580395003)(76482001)(107046002)(57986006)(97736001)(99396002)(85306004)(2351001)(4396001)(83506001)(76176999)(19580405001)(81342001)(46102001)(74502001)(69596002)(26826002)(47776003)(92566001); DIR:OUT; SFP:; SCL:1; SRVR:DM2PR03MB573; H:az84smr01.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;UriScan:; X-Forefront-PRVS: 03218BFD9F Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Shawn.Guo@freescale.com; X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140831_181426_582238_2166DE05 X-CRM114-Status: GOOD ( 12.42 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [207.46.163.143 listed in list.dnswl.org] -0.7 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [207.46.163.143 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record Cc: kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org On Mon, Sep 01, 2014 at 09:02:18AM +0800, Shawn Guo wrote: > With commit c716483c3db1 ("ARM: 8122/1: smp_scu: enable SCU standby > support"), the STANDBY bit of SCU is handled by core function > scu_enable(). So imx_scu_standby_enable() can be removed now. > > Signed-off-by: Shawn Guo > --- > arch/arm/mach-imx/common.h | 2 -- > arch/arm/mach-imx/cpuidle-imx6q.c | 4 ---- > arch/arm/mach-imx/platsmp.c | 8 -------- > 3 files changed, 14 deletions(-) > > diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h > index 22ba8973bcb9..1dabf435c592 100644 > --- a/arch/arm/mach-imx/common.h > +++ b/arch/arm/mach-imx/common.h > @@ -98,11 +98,9 @@ void imx_set_cpu_arg(int cpu, u32 arg); > void v7_secondary_startup(void); > void imx_scu_map_io(void); > void imx_smp_prepare(void); > -void imx_scu_standby_enable(void); > #else > static inline void imx_scu_map_io(void) {} > static inline void imx_smp_prepare(void) {} > -static inline void imx_scu_standby_enable(void) {} > #endif > void imx_src_init(void); > void imx_gpc_init(void); > diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c > index 10844d3bb926..aa935787b743 100644 > --- a/arch/arm/mach-imx/cpuidle-imx6q.c > +++ b/arch/arm/mach-imx/cpuidle-imx6q.c > @@ -66,10 +66,6 @@ static struct cpuidle_driver imx6q_cpuidle_driver = { > > int __init imx6q_cpuidle_init(void) > { > - /* Need to enable SCU standby for entering WAIT modes */ > - if (!cpu_is_imx6sx()) > - imx_scu_standby_enable(); > - > /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ > imx6q_set_int_mem_clk_lpm(true); > > diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c > index 5b57c17c06bd..31edbcd70c27 100644 > --- a/arch/arm/mach-imx/platsmp.c > +++ b/arch/arm/mach-imx/platsmp.c > @@ -45,14 +45,6 @@ void __init imx_scu_map_io(void) > scu_base = IMX_IO_ADDRESS(base); > } > > -void imx_scu_standby_enable(void) > -{ > - u32 val = readl_relaxed(scu_base); > - > - val |= SCU_STANDBY_ENABLE; The following trunk is missed, since SCU_STANDBY_ENABLE is unused after the change. Shawn diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 5b57c17c06bd..771bd25c1025 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -20,8 +20,6 @@ #include "common.h" #include "hardware.h" -#define SCU_STANDBY_ENABLE (1 << 5) - u32 g_diag_reg; static void __iomem *scu_base;