From patchwork Tue Apr 15 09:48:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Barry Song <21cnbao@gmail.com> X-Patchwork-Id: 339217 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id BDD051400EB for ; Tue, 15 Apr 2014 19:52:16 +1000 (EST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WZzzQ-0001zW-9m; Tue, 15 Apr 2014 09:49:16 +0000 Received: from mail-pb0-x22b.google.com ([2607:f8b0:400e:c01::22b]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WZzzN-0001lj-84 for linux-arm-kernel@lists.infradead.org; Tue, 15 Apr 2014 09:49:14 +0000 Received: by mail-pb0-f43.google.com with SMTP id um1so9346302pbc.30 for ; Tue, 15 Apr 2014 02:48:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; bh=OPHnL/W6qMYBcRCZ/1o7DMBdDylrqUVmpJf196yat9w=; b=jB5jKzNqGM0C9LeAb3c2NHrPfSi6PV9cymQ9LqkhvtrZ6ufWzaSE5ETe3GaLEEdmAT 8ifYSJbso7atB+No5gdxpKC1IAr5uQtbs0jDLz8XefqCXYvVMrWfhNeiKvn0rWBlIwaJ ZDoyfQw68qikFOrulxlbXUdoQZBHlk+NmcRfdTLSAiK5VJkRLZAz/6A/9EzO3+h2EMzu 0po86TuRRjzbv8xcpNxeYhFUjSPaQUjWb1rjuyNoy6gFc5SII4mxbnnKqS0nLCglIkQk /72g/Vj8YtlYrkBS8rh8QDbXX23feHdCZ/fRucC3CXfu3/K40EYyQs6Vt6yRocYwip3q GhTA== X-Received: by 10.67.13.226 with SMTP id fb2mr839573pad.146.1397555331217; Tue, 15 Apr 2014 02:48:51 -0700 (PDT) Received: from barry-laptop.ROOT.PRI ([117.136.8.59]) by mx.google.com with ESMTPSA id zv3sm93265058pab.20.2014.04.15.02.48.43 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 15 Apr 2014 02:48:49 -0700 (PDT) From: Barry Song <21cnbao@gmail.com> To: mturquette@linaro.org Subject: =?UTF-8?q?=5BPATCH=20v2=5D=20clk=3A=20sirf=3A=20fix=20a=20bundle=20of=20checkpatch=20issues?= Date: Tue, 15 Apr 2014 17:48:07 +0800 Message-Id: <1397555287-25544-1-git-send-email-21cnbao@gmail.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140415_024913_328817_1208C135 X-CRM114-Status: GOOD ( 14.44 ) X-Spam-Score: -0.1 (/) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (21cnbao[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid Cc: Bin Shi , Barry Song , workgroup.linux@csr.com, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Bin Shi fix the below checkpatch issues about which users of codes - key customers care very much. WARNING: line over 80 characters 66: FILE: clk-atlas6.c:66: + usp2, vip, gfx, gfx2d, lcd, vpp, mmc01, mmc23, mmc45, usbpll, total: 0 errors, 1 warnings, 153 lines checked clk-atlas6.c has style problems, please review. If any of these errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. WARNING: line over 80 characters 24: FILE: clk-common.c:24: + * Each clock domain can select its own clock source from five clock sources, WARNING: line over 80 characters 25: FILE: clk-common.c:25: + * X_XIN, X_XINW, PLL1, PLL2 and PLL3. The domain clock is used as the source WARNING: line over 80 characters 171: FILE: clk-common.c:171: + return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, &pll_parent_rate); WARNING: static const char * array should probably be static const char * const 191: FILE: clk-common.c:191: +static const char *pll_clk_parents[] = { WARNING: line over 80 characters 260: FILE: clk-common.c:260: +static unsigned long usb_pll_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) WARNING: static const char * array should probably be static const char * const 287: FILE: clk-common.c:287: +static const char *dmn_clk_parents[] = { WARNING: static const char * array should probably be static const char * const 676: FILE: clk-common.c:676: +static const char *std_clk_io_parents[] = { WARNING: static const char * array should probably be static const char * const 952: FILE: clk-common.c:952: +static const char *std_clk_dsp_parents[] = { WARNING: static const char * array should probably be static const char * const 984: FILE: clk-common.c:984: +static const char *std_clk_sys_parents[] = { WARNING: static const char * array should probably be static const char * const 1002: FILE: clk-common.c:1002: +static const char *std_clk_usb_parents[] = { total: 0 errors, 10 warnings, 1032 lines checked clk-common.c has style problems, please review. If any of these errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS. total: 0 errors, 0 warnings, 1032 lines checked clk-common.c.orig has no obvious style problems and is ready for submission. WARNING: line over 80 characters 65: FILE: clk-prima2.c:65: + usp2, vip, gfx, mm, lcd, vpp, mmc01, mmc23, mmc45, usbpll, total: 0 errors, 1 warnings, 152 lines checked Cc: Uwe Kleine-König Signed-off-by: Bin Shi Signed-off-by: Barry Song --- drivers/clk/sirf/clk-atlas6.c | 12 ++++++------ drivers/clk/sirf/clk-common.c | 22 ++++++++++++---------- drivers/clk/sirf/clk-prima2.c | 10 +++++----- 3 files changed, 23 insertions(+), 21 deletions(-) diff --git a/drivers/clk/sirf/clk-atlas6.c b/drivers/clk/sirf/clk-atlas6.c index d63b76c..bca0052 100644 --- a/drivers/clk/sirf/clk-atlas6.c +++ b/drivers/clk/sirf/clk-atlas6.c @@ -59,12 +59,12 @@ static struct clk_dmn clk_nand = { }; enum atlas6_clk_index { - /* 0 1 2 3 4 5 6 7 8 9 */ - rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, - mf, io, cpu, uart0, uart1, uart2, tsc, i2c0, i2c1, spi0, - spi1, pwmc, efuse, pulse, dmac0, dmac1, nand, audio, usp0, usp1, - usp2, vip, gfx, gfx2d, lcd, vpp, mmc01, mmc23, mmc45, usbpll, - usb0, usb1, cphif, maxclk, + /* 0 1 2 3 4 5 6 7 8 9 */ + rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, + mf, io, cpu, uart0, uart1, uart2, tsc, i2c0, i2c1, spi0, + spi1, pwmc, efuse, pulse, dmac0, dmac1, nand, audio, usp0, usp1, + usp2, vip, gfx, gfx2d, lcd, vpp, mmc01, mmc23, mmc45, usbpll, + usb0, usb1, cphif, maxclk, }; static __initdata struct clk_hw *atlas6_clk_hw_array[maxclk] = { diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c index 37af51c..aebaec01 100644 --- a/drivers/clk/sirf/clk-common.c +++ b/drivers/clk/sirf/clk-common.c @@ -21,8 +21,8 @@ static struct clk_onecell_data clk_data; * - 2 exclusive plls: usb phy pll and sata phy pll * - 8 clock domains: cpu/cpudiv, mem/memdiv, sys/io, dsp, graphic, multimedia, * display and sdphy. - * Each clock domain can select its own clock source from five clock sources, - * X_XIN, X_XINW, PLL1, PLL2 and PLL3. The domain clock is used as the source + * Each clock domain can select its own clock source from 5 clock sources, + * X_XIN, X_XINW, PLL1, PLL2 & PLL3. Domain clock is used as the source * clock of the group clock. * - dsp domain: gps, mf * - io domain: dmac, nand, audio, uart, i2c, spi, usp, pwm, pulse @@ -168,7 +168,8 @@ static long cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate, struct clk *parent_clk = clk_get_parent(hw->clk); struct clk *pll_parent_clk = clk_get_parent(parent_clk); unsigned long pll_parent_rate = clk_get_rate(pll_parent_clk); - return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, &pll_parent_rate); + return pll_clk_round_rate(__clk_get_hw(parent_clk), + rate, &pll_parent_rate); } static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw, @@ -188,7 +189,7 @@ static struct clk_ops std_pll_ops = { .set_rate = pll_clk_set_rate, }; -static const char *pll_clk_parents[] = { +static const char * const pll_clk_parents[] = { "osc", }; @@ -257,7 +258,8 @@ static void usb_pll_clk_disable(struct clk_hw *clk) writel(reg, sirfsoc_rsc_vbase + SIRFSOC_USBPHY_PLL_CTRL); } -static unsigned long usb_pll_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) +static unsigned long usb_pll_clk_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) { u32 reg = readl(sirfsoc_rsc_vbase + SIRFSOC_USBPHY_PLL_CTRL); return (reg & SIRFSOC_USBPHY_PLL_BYPASS) ? parent_rate : 48*MHZ; @@ -284,7 +286,7 @@ static struct clk_hw usb_pll_clk_hw = { * clock domains - cpu, mem, sys/io, dsp, gfx */ -static const char *dmn_clk_parents[] = { +static const char * const dmn_clk_parents[] = { "rtc", "osc", "pll1", @@ -673,7 +675,7 @@ static void std_clk_disable(struct clk_hw *hw) clkc_writel(val, reg); } -static const char *std_clk_io_parents[] = { +static const char * const std_clk_io_parents[] = { "io", }; @@ -949,7 +951,7 @@ static struct clk_std clk_pulse = { }, }; -static const char *std_clk_dsp_parents[] = { +static const char * const std_clk_dsp_parents[] = { "dsp", }; @@ -981,7 +983,7 @@ static struct clk_std clk_mf = { }, }; -static const char *std_clk_sys_parents[] = { +static const char * const std_clk_sys_parents[] = { "sys", }; @@ -999,7 +1001,7 @@ static struct clk_std clk_security = { }, }; -static const char *std_clk_usb_parents[] = { +static const char * const std_clk_usb_parents[] = { "usb_pll", }; diff --git a/drivers/clk/sirf/clk-prima2.c b/drivers/clk/sirf/clk-prima2.c index 6968e2e..83d74c4 100644 --- a/drivers/clk/sirf/clk-prima2.c +++ b/drivers/clk/sirf/clk-prima2.c @@ -59,11 +59,11 @@ static struct clk_std clk_nand = { enum prima2_clk_index { /* 0 1 2 3 4 5 6 7 8 9 */ - rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, - mf, io, cpu, uart0, uart1, uart2, tsc, i2c0, i2c1, spi0, - spi1, pwmc, efuse, pulse, dmac0, dmac1, nand, audio, usp0, usp1, - usp2, vip, gfx, mm, lcd, vpp, mmc01, mmc23, mmc45, usbpll, - usb0, usb1, cphif, maxclk, + rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, + mf, io, cpu, uart0, uart1, uart2, tsc, i2c0, i2c1, spi0, + spi1, pwmc, efuse, pulse, dmac0, dmac1, nand, audio, usp0, usp1, + usp2, vip, gfx, mm, lcd, vpp, mmc01, mmc23, mmc45, usbpll, + usb0, usb1, cphif, maxclk, }; static __initdata struct clk_hw *prima2_clk_hw_array[maxclk] = {