From patchwork Tue Jan 7 10:00:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 307602 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from casper.infradead.org (unknown [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 337DA2C010D for ; Tue, 7 Jan 2014 21:02:01 +1100 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W0TTg-0005VN-Vz; Tue, 07 Jan 2014 10:01:41 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1W0TTe-0002Cf-Jb; Tue, 07 Jan 2014 10:01:38 +0000 Received: from mail-yh0-x234.google.com ([2607:f8b0:4002:c01::234]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1W0TTb-0002Bp-Lv for linux-arm-kernel@lists.infradead.org; Tue, 07 Jan 2014 10:01:36 +0000 Received: by mail-yh0-f52.google.com with SMTP id i7so3842907yha.25 for ; Tue, 07 Jan 2014 02:01:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=Ubphl9Lq1e6qWtL7PMKdZB19cFAfjgxzxNWwk7MvsIA=; b=KNK0uO+aY7ZuyzipFCp/FSg8X47cMM8+6/8c2Xt/Pfm0NFaWs+qxHJGT1B277D8Mb8 p/6z6XNwjI28hvmPVqohXBKaiTfl+s1ysq/oAUw9kndaU4PGxqtkSLyqBfY5a8tA0nGw JOWFq5pWercB5SDUhes/9Neg8S7BxiWCTCZKlRVUwBPCcgCfWjsOoKzr1qHCWEz4cvDJ gefXCJspTC+Mgmw2Ug6P+mgZ1Yjtvwnc/lyYcrTpWV6QFaXaR59puoCutiHZjMp36b7a OCD55Woqv1N5iWKwO8KPt4ZOzr4cOMh+xg7NFMxzsHJX84DqW+2/WBuxAdnBVDVsdFFg pGLA== X-Received: by 10.236.104.166 with SMTP id i26mr356074yhg.135.1389088873312; Tue, 07 Jan 2014 02:01:13 -0800 (PST) Received: from localhost.localdomain ([177.194.45.53]) by mx.google.com with ESMTPSA id v35sm23343407yhp.25.2014.01.07.02.01.12 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 07 Jan 2014 02:01:12 -0800 (PST) From: Fabio Estevam To: shawn.guo@linaro.org Subject: [PATCH] ARM: imx: Use INT_MEM_CLK_LPM as the bit name Date: Tue, 7 Jan 2014 08:00:40 -0200 Message-Id: <1389088840-14444-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.8.1.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140107_050135_776609_DEC0C71F X-CRM114-Status: GOOD ( 11.89 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (festevam[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Fabio Estevam , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Fabio Estevam Bit 17 of register CCM_CGPR is called INT_MEM_CLK_LPM as per the mx6 reference manual, so use this name instead. Signed-off-by: Fabio Estevam --- arch/arm/mach-imx/common.h | 2 +- arch/arm/mach-imx/cpuidle-imx6q.c | 4 ++-- arch/arm/mach-imx/pm-imx6q.c | 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 59c3b9b..4f4a95c 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -139,7 +139,7 @@ void imx_anatop_init(void); void imx_anatop_pre_suspend(void); void imx_anatop_post_resume(void); int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); -void imx6q_set_chicken_bit(void); +void imx6q_set_int_mem_clk_lpm(void); void imx_cpu_die(unsigned int cpu); int imx_cpu_kill(unsigned int cpu); diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c index 23ddfb6..6bcae04 100644 --- a/arch/arm/mach-imx/cpuidle-imx6q.c +++ b/arch/arm/mach-imx/cpuidle-imx6q.c @@ -68,8 +68,8 @@ int __init imx6q_cpuidle_init(void) /* Need to enable SCU standby for entering WAIT modes */ imx_scu_standby_enable(); - /* Set chicken bit to get a reliable WAIT mode support */ - imx6q_set_chicken_bit(); + /* Set INT_MEM_CLK_LPM bit to get a reliable WAIT mode support */ + imx6q_set_int_mem_clk_lpm(); return cpuidle_register(&imx6q_cpuidle_driver, NULL); } diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c index 9d47adc..d45acc0 100644 --- a/arch/arm/mach-imx/pm-imx6q.c +++ b/arch/arm/mach-imx/pm-imx6q.c @@ -56,15 +56,15 @@ #define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27) #define CGPR 0x64 -#define BM_CGPR_CHICKEN_BIT (0x1 << 17) +#define BM_CGPR_INT_MEM_CLK_LPM (0x1 << 17) static void __iomem *ccm_base; -void imx6q_set_chicken_bit(void) +void imx6q_set_int_mem_clk_lpm(void) { u32 val = readl_relaxed(ccm_base + CGPR); - val |= BM_CGPR_CHICKEN_BIT; + val |= BM_CGPR_INT_MEM_CLK_LPM; writel_relaxed(val, ccm_base + CGPR); }