From patchwork Thu Aug 23 15:32:39 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: hachimi.samir@gmail.com X-Patchwork-Id: 179672 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 5C20B2C00AF for ; Fri, 24 Aug 2012 01:38:08 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1T4ZQc-0008E6-GW; Thu, 23 Aug 2012 15:34:38 +0000 Received: from mail-wi0-f171.google.com ([209.85.212.171]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1T4ZQL-0008BX-SN for linux-arm-kernel@lists.infradead.org; Thu, 23 Aug 2012 15:34:23 +0000 Received: by wibhq4 with SMTP id hq4so893529wib.0 for ; Thu, 23 Aug 2012 08:34:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=RUOnrUCbCl4tzcLVqUc4ViRcP62lWzPzbhylynZ6fE8=; b=Op2H0ol1YbR8rXDNeSSGLXX5LuE9eDczLYe55erdFaF0DgVVpT/KzBs0vUwZqSEbHZ 5gLXC4TNX5ITE28OsIhAmMRHpPE3UFYSaJDQnuy0e9RY6Kt78r/pfYfsAL81zedbsp3n c3+DGtW8LOmecycwF1FUxE5QM9FbLUmYlegqb/AkyZLAgI1wOmb1LwxTu09rVZCee93X ceebNGsmY94FKjRRncKN/y1vB1WL/ZHFDpg34SO+AFOV7PSoxr+O2fCHQJdKH6RkAGGi yL59dxUeZ8X2jhwKcte2pBy5nEnOj/nopmGVfRsHl1oNefZTzSoE9wZ7A5Tj5Hgg36Ka 3UFQ== Received: by 10.180.106.137 with SMTP id gu9mr4925462wib.20.1345736060091; Thu, 23 Aug 2012 08:34:20 -0700 (PDT) Received: from localhost.localdomain ([213.144.218.64]) by mx.google.com with ESMTPS id cl8sm45359944wib.10.2012.08.23.08.34.19 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 23 Aug 2012 08:34:19 -0700 (PDT) From: hachimi.samir@gmail.com To: shawn.guo@linaro.org Subject: [PATCH 2/2] imx6q: Set pwm control register during enable and config call Date: Thu, 23 Aug 2012 17:32:39 +0200 Message-Id: <1345735959-12964-3-git-send-email-hachimi.samir@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <[PATCH 0/2] imx6q: pwm: Activate stop_mode and remove auto enable after configuration> References: <[PATCH 0/2] imx6q: pwm: Activate stop_mode and remove auto enable after configuration> X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.171 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (hachimi.samir[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Samir Hachimi , s.hauer@pengutronix.de, Samir Hachimi , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Samir Hachimi Bind pwm node with driver. Activate stop_enable mode when imx_pwm_config and set enable bit in pwm CR register during imx_pwm_enable. Signed-off-by: Samir Hachimi --- arch/arm/boot/dts/imx6q.dtsi | 8 ++++++++ arch/arm/mach-imx/clk-imx6q.c | 4 ++++ drivers/pwm/pwm-imx.c | 34 +++++++++++++++++++++++----------- 3 files changed, 35 insertions(+), 11 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index c913b99..7ce9dc1 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -248,6 +248,8 @@ }; pwm@02080000 { /* PWM1 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1_1>; reg = <0x02080000 0x4000>; @@ -256,6 +258,8 @@ }; pwm@02084000 { /* PWM2 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2_1>; reg = <0x02084000 0x4000>; @@ -264,6 +268,8 @@ }; pwm@02088000 { /* PWM3 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3_1>; reg = <0x02088000 0x4000>; @@ -272,6 +278,8 @@ }; pwm@0208c000 { /* PWM4 */ + compatible = "fsl,imx6q-pwm"; + #pwm-cells = <2>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4_1>; reg = <0x0208c000 0x4000>; diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index ea89520..057740b 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -430,6 +430,10 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[ecspi3], NULL, "2010000.ecspi"); clk_register_clkdev(clk[ecspi4], NULL, "2014000.ecspi"); clk_register_clkdev(clk[ecspi5], NULL, "2018000.ecspi"); + clk_register_clkdev(clk[pwm1], "pwm", "2080000.pwm"); + clk_register_clkdev(clk[pwm2], "pwm", "2084000.pwm"); + clk_register_clkdev(clk[pwm3], "pwm", "2088000.pwm"); + clk_register_clkdev(clk[pwm4], "pwm", "208c000.pwm"); clk_register_clkdev(clk[sdma], NULL, "20ec000.sdma"); clk_register_clkdev(clk[dummy], NULL, "20bc000.wdog"); clk_register_clkdev(clk[dummy], NULL, "20c0000.wdog"); diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 2a0b353..0b13f34 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -32,6 +33,7 @@ #define MX3_PWMSAR 0x0C /* PWM Sample Register */ #define MX3_PWMPR 0x10 /* PWM Period Register */ #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) +#define MX3_PWMCR_STOPEN (1 << 25) #define MX3_PWMCR_DOZEEN (1 << 24) #define MX3_PWMCR_WAITEN (1 << 23) #define MX3_PWMCR_DBGEN (1 << 22) @@ -68,25 +70,21 @@ static int imx_pwm_config(struct pwm_chip *chip, prescale = period_cycles / 0x10000 + 1; period_cycles /= prescale; - c = (unsigned long long)period_cycles * duty_ns; - do_div(c, period_ns); - duty_cycles = c; - /* - * according to imx pwm RM, the real period value should be - * PERIOD value in PWMPR plus 2. + /* the chip documentation says the counter counts up to + * period_cycles + 1 and then is reset to 0, so the + * actual period of the PWM wave is period_cycles + 2 */ - if (period_cycles > 2) - period_cycles -= 2; - else - period_cycles = 0; + c = (unsigned long long)(period_cycles + 2) * duty_ns; + do_div(c, period_ns); + duty_cycles = c; writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); writel(period_cycles, imx->mmio_base + MX3_PWMPR); cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | - MX3_PWMCR_DBGEN | MX3_PWMCR_EN; + MX3_PWMCR_DBGEN | MX3_PWMCR_STOPEN; if (cpu_is_mx25()) cr |= MX3_PWMCR_CLKSRC_IPG; @@ -124,6 +122,7 @@ static int imx_pwm_config(struct pwm_chip *chip, static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) { struct imx_chip *imx = to_imx_chip(chip); + unsigned long reg; int rc = 0; if (!imx->clk_enabled) { @@ -131,6 +130,11 @@ static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) if (!rc) imx->clk_enabled = 1; } + + reg = readl(imx->mmio_base + MX3_PWMCR); + reg |= MX3_PWMCR_EN; + writel(reg, imx->mmio_base + MX3_PWMCR); + return rc; } @@ -206,9 +212,15 @@ static int __devexit imx_pwm_remove(struct platform_device *pdev) return pwmchip_remove(&imx->chip); } +static const struct of_device_id mxc_pwm_dt_ids[] = { + { .compatible = "fsl,imx6q-pwm", }, + { /* sentinel */ } +}; + static struct platform_driver imx_pwm_driver = { .driver = { .name = "mxc_pwm", + .of_match_table = of_match_ptr(mxc_pwm_dt_ids), }, .probe = imx_pwm_probe, .remove = __devexit_p(imx_pwm_remove),