From patchwork Sat Jul 30 18:53:19 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 107511 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 2D812B6F6B for ; Sun, 31 Jul 2011 04:41:08 +1000 (EST) Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QnET7-00074M-Ov; Sat, 30 Jul 2011 18:41:02 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QnET7-0005eX-8z; Sat, 30 Jul 2011 18:41:01 +0000 Received: from mail-iy0-f177.google.com ([209.85.210.177]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QnESf-0005au-UY for linux-arm-kernel@lists.infradead.org; Sat, 30 Jul 2011 18:40:35 +0000 Received: by iyn15 with SMTP id 15so6350009iyn.36 for ; Sat, 30 Jul 2011 11:40:31 -0700 (PDT) Received: by 10.143.20.5 with SMTP id x5mr1693754wfi.41.1312051230831; Sat, 30 Jul 2011 11:40:30 -0700 (PDT) Received: from localhost.localdomain ([114.216.144.205]) by mx.google.com with ESMTPS id e6sm3488539pbm.87.2011.07.30.11.40.25 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 30 Jul 2011 11:40:30 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/3] arm/mx5: parse iomuxc pad configuratoin from device tree Date: Sun, 31 Jul 2011 02:53:19 +0800 Message-Id: <1312052001-16660-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1312052001-16660-1-git-send-email-shawn.guo@linaro.org> References: <1312052001-16660-1-git-send-email-shawn.guo@linaro.org> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110730_144034_276946_421559EF X-CRM114-Status: GOOD ( 18.53 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.177 listed in list.dnswl.org] Cc: Grant Likely , devicetree-discuss@lists.ozlabs.org, Shawn Guo , Sascha Hauer , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org It adds function mxc_iomuxc_dt_init() to parse iomuxc pad configuration from device tree. Signed-off-by: Shawn Guo Cc: Grant Likely Cc: Sascha Hauer --- .../devicetree/bindings/arm/fsl/iomuxc.txt | 47 +++++++++++++ arch/arm/mach-mx5/Makefile | 2 + arch/arm/mach-mx5/iomuxc-dt.c | 70 ++++++++++++++++++++ arch/arm/plat-mxc/include/mach/common.h | 3 + 4 files changed, 122 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/fsl/iomuxc.txt create mode 100644 arch/arm/mach-mx5/iomuxc-dt.c diff --git a/Documentation/devicetree/bindings/arm/fsl/iomuxc.txt b/Documentation/devicetree/bindings/arm/fsl/iomuxc.txt new file mode 100644 index 0000000..ae9292b --- /dev/null +++ b/Documentation/devicetree/bindings/arm/fsl/iomuxc.txt @@ -0,0 +1,47 @@ +* Freescale i.MX IOMUX Controller (IOMUXC) + +Required properties: +- compatible : "fsl,-iomuxc"; + +Sub-nodes present individual PAD configuration, and node name is the +PAD name given by hardware document. + +Required properties: +- reg : Should contain the offset of registers + IOMUXC_SW_MUX_CTL_PAD_ and IOMUXC_SW_PAD_CTL_PAD_. +- fsl,iomuxc-mux-mode : Should specify the MUX_MODE setting of register + IOMUXC_SW_MUX_CTL_PAD_. + +Optional properties: +- fsl,iomuxc-sion : Indicates that bit SION of register + IOMUXC_SW_MUX_CTL_PAD_ needs to be set for given MUX_MODE + setting of the PAD. +- fsl,iomuxc-select-input : Specify the offset of register + IOMUXC_<...>_SELECT_INPUT and the value of bit-field DAISY for given + MUX_MODE setting of the PAD. + +Examples: + +iomuxc@53fa8000 { + #address-cells = <2>; + #size-cells = <0>; + compatible = "fsl,imx53-iomuxc"; + reg = <0x53fa8000 0x4000>; + + /* + * I2C2 + */ + key-col3 { /* I2C2_SCL */ + reg = <0x3c 0x364>; + fsl,iomuxc-mux-mode = <4>; + fsl,iomuxc-sion; + fsl,iomuxc-select-input = <0x81c 0x0>; + }; + + key-row3 { /* I2C2_SDA */ + reg = <0x40 0x368>; + fsl,iomuxc-mux-mode = <4>; + fsl,iomuxc-sion; + fsl,iomuxc-select-input = <0x820 0x0>; + }; +}; diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 383e7cd..71379f6 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -22,3 +22,5 @@ obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o + +obj-$(CONFIG_OF) += iomuxc-dt.o diff --git a/arch/arm/mach-mx5/iomuxc-dt.c b/arch/arm/mach-mx5/iomuxc-dt.c new file mode 100644 index 0000000..b974924 --- /dev/null +++ b/arch/arm/mach-mx5/iomuxc-dt.c @@ -0,0 +1,70 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include + +#define IOMUXC_CONFIG_SION (1 << 4) + +void mxc_iomuxc_dt_init(const struct of_device_id *match) +{ + struct device_node *node = of_find_matching_node(NULL, match); + struct device_node *child; + void __iomem *base; + u32 reg[2], select_input[2]; + u32 mux_mode, pad_ctl; + + if (!node) + return; + + if (of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg))) { + pr_warn("%s: property 'reg' not found\n", __func__); + goto out; + } + + base = ioremap(reg[0], reg[1]); + if (!base) { + pr_warn("%s: ioremap failed\n", __func__); + goto out; + } + + for_each_child_of_node(node, child) { + /* get regsister offset of mux_ctl and pad_ctl */ + if (of_property_read_u32_array(child, "reg", reg, + ARRAY_SIZE(reg))) + continue; + + /* set register mux_ctl */ + if (of_property_read_u32(child, "fsl,iomuxc-mux-mode", + &mux_mode)) + continue; + if (of_get_property(child, "fsl,iomuxc-sion", NULL)) + mux_mode |= IOMUXC_CONFIG_SION; + writel(mux_mode, base + reg[0]); + + /* set register pad_ctl */ + if (!of_property_read_u32(child, "fsl,iomuxc-pad-ctl", + &pad_ctl)) + writel(pad_ctl, base + reg[1]); + + /* get offset/value pair and set select_input register */ + if (!of_property_read_u32_array(child, + "fsl,iomuxc-select-input", select_input, + ARRAY_SIZE(select_input))) + writel(select_input[1], base + select_input[0]); + } + + iounmap(base); + +out: + of_node_put(node); +} diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 4e3d978..12b7499 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -13,6 +13,7 @@ struct platform_device; struct clk; +struct of_device_id; extern void mx1_map_io(void); extern void mx21_map_io(void); @@ -72,4 +73,6 @@ extern void mxc_arch_reset_init(void __iomem *); extern void mx51_efikamx_reset(void); extern int mx53_revision(void); extern int mx53_display_revision(void); + +extern void mxc_iomuxc_dt_init(const struct of_device_id *match); #endif