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[0/4] Add i.MX6ULZ SoC support

Message ID 1537251548-27845-1-git-send-email-Anson.Huang@nxp.com
Headers show
Series Add i.MX6ULZ SoC support | expand

Message

Anson Huang Sept. 18, 2018, 6:19 a.m. UTC 
This patch set adds i.MX6ULZ SoC support, i.MX6ULZ is a new SoC of
i.MX6 family, compared to i.MX6ULL, it removes below modules:

    - UART5/UART6/UART7/UART8;
    - PWM5/PWM6/PWM7/PWM8;
    - eCSPI3/eCSPI4;
    - CAN1/CAN2;
    - FEC1/FEC2;
    - I2C3/I2C4;
    - EPIT2;
    - LCDIF;
    - GPT2;
    - TSC;

And i.MX6ULZ has same soc_id as i.MX6ULL, but SRC_SBMR2 bit[6] is
to differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means i.MX6ULZ and
1'b0 means i.MX6ULL. i.MX6ULZ reuse most of i.MX6UL/i.MX6ULL code,
just add the new CPU type and remove those non-exist modules from dtb.

Anson Huang (4):
  ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
  ARM: imx: add i.mx6ulz msl support
  clk: imx6ul: add i.mx6ulz support
  dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board

 Documentation/devicetree/bindings/arm/fsl.txt |  4 +++
 arch/arm/boot/dts/Makefile                    |  3 ++-
 arch/arm/boot/dts/imx6ulz-14x14-evk.dts       | 20 ++++++++++++++
 arch/arm/boot/dts/imx6ulz.dtsi                | 38 +++++++++++++++++++++++++++
 arch/arm/mach-imx/anatop.c                    | 20 ++++++++++++++
 arch/arm/mach-imx/cpu.c                       |  3 +++
 arch/arm/mach-imx/mach-imx6ul.c               |  1 +
 arch/arm/mach-imx/mxc.h                       |  7 +++++
 arch/arm/mach-imx/pm-imx6.c                   |  4 +--
 drivers/clk/imx/clk-imx6ul.c                  |  3 ++-
 10 files changed, 99 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6ulz-14x14-evk.dts
 create mode 100644 arch/arm/boot/dts/imx6ulz.dtsi

Comments

Stefan Wahren Sept. 18, 2018, 7:38 a.m. UTC | #1 
Hi Anson,

Am 18.09.2018 um 08:19 schrieb Anson Huang:
> This patch set adds i.MX6ULZ SoC support, i.MX6ULZ is a new SoC of
> i.MX6 family, compared to i.MX6ULL, it removes below modules:
>
>     - UART5/UART6/UART7/UART8;
>     - PWM5/PWM6/PWM7/PWM8;
>     - eCSPI3/eCSPI4;
>     - CAN1/CAN2;
>     - FEC1/FEC2;
>     - I2C3/I2C4;
>     - EPIT2;
>     - LCDIF;
>     - GPT2;
>     - TSC;
>
> And i.MX6ULZ has same soc_id as i.MX6ULL, but SRC_SBMR2 bit[6] is
> to differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means i.MX6ULZ and
> 1'b0 means i.MX6ULL. i.MX6ULZ reuse most of i.MX6UL/i.MX6ULL code,
> just add the new CPU type and remove those non-exist modules from dtb.
>
> Anson Huang (4):
>   ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
>   ARM: imx: add i.mx6ulz msl support
>   clk: imx6ul: add i.mx6ulz support
>   dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
>
>  

i recommend the following patch order:
ARM: imx: add i.mx6ulz msl support
clk: imx6ul: add i.mx6ulz support
dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support

Stefan
Anson Huang Sept. 19, 2018, 6:10 a.m. UTC | #2 
Hi, Stefan

Anson Huang
Best Regards!


> -----Original Message-----
> From: Stefan Wahren <stefan.wahren@i2se.com>
> Sent: Tuesday, September 18, 2018 3:38 PM
> To: Anson Huang <anson.huang@nxp.com>; robh+dt@kernel.org;
> mark.rutland@arm.com; shawnguo@kernel.org; s.hauer@pengutronix.de;
> kernel@pengutronix.de; Fabio Estevam <fabio.estevam@nxp.com>;
> linux@armlinux.org.uk; mturquette@baylibre.com; sboyd@kernel.org; Jacky
> Bai <ping.bai@nxp.com>; A.s. Dong <aisheng.dong@nxp.com>;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; linux-clk@vger.kernel.org
> Cc: dl-linux-imx <linux-imx@nxp.com>
> Subject: Re: [PATCH 0/4] Add i.MX6ULZ SoC support
> 
> Hi Anson,
> 
> Am 18.09.2018 um 08:19 schrieb Anson Huang:
> > This patch set adds i.MX6ULZ SoC support, i.MX6ULZ is a new SoC of
> > i.MX6 family, compared to i.MX6ULL, it removes below modules:
> >
> >     - UART5/UART6/UART7/UART8;
> >     - PWM5/PWM6/PWM7/PWM8;
> >     - eCSPI3/eCSPI4;
> >     - CAN1/CAN2;
> >     - FEC1/FEC2;
> >     - I2C3/I2C4;
> >     - EPIT2;
> >     - LCDIF;
> >     - GPT2;
> >     - TSC;
> >
> > And i.MX6ULZ has same soc_id as i.MX6ULL, but SRC_SBMR2 bit[6] is to
> > differentiate i.MX6ULZ from i.MX6ULL, 1'b1 means i.MX6ULZ and
> > 1'b0 means i.MX6ULL. i.MX6ULZ reuse most of i.MX6UL/i.MX6ULL code,
> > just add the new CPU type and remove those non-exist modules from dtb.
> >
> > Anson Huang (4):
> >   ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
> >   ARM: imx: add i.mx6ulz msl support
> >   clk: imx6ul: add i.mx6ulz support
> >   dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
> >
> >
> 
> i recommend the following patch order:
> ARM: imx: add i.mx6ulz msl support
> clk: imx6ul: add i.mx6ulz support
> dt-bindings: arm: add compatible for i.MX6ULZ 14x14 EVK board
> ARM: dts: imx: add i.mx6ulz and i.mx6ulz 14x14 evk support
> 
> Stefan
 
Thanks, I resend the V2 patch set with the patch order you recommended.

Anson.