diff mbox series

ata: pata_hpt37x: disable primary channel on HPT371

Message ID e398d6e3-05f2-409f-6818-812f24e325eb@omp.ru
State New
Headers show
Series ata: pata_hpt37x: disable primary channel on HPT371 | expand

Commit Message

Sergey Shtylyov Feb. 19, 2022, 5:44 p.m. UTC
HPT371 chips physically have only one channel, the secondary one, however
the primary channel registers do exist!  Thus we have to manually disable
the non-existing channel (if the BIOS hasn't done this already).  Alan Cox
has only added such code to the 'pata_hpt3x2n' driver, forgetting about
this one... :-/

Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>

---
This patch is against the 'for-next' branch of Damien Le Moal's 'libata.git'
repo.

 drivers/ata/pata_hpt37x.c |   14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Damien Le Moal Feb. 22, 2022, 12:37 a.m. UTC | #1
On 2/20/22 02:44, Sergey Shtylyov wrote:
> HPT371 chips physically have only one channel, the secondary one, however
> the primary channel registers do exist!  Thus we have to manually disable
> the non-existing channel (if the BIOS hasn't done this already).  Alan Cox
> has only added such code to the 'pata_hpt3x2n' driver, forgetting about
> this one... :-/

No need to assign blame by name :) Something more neutral like:

"Similarly to the pata_hpt3x2n driver, always disable the primary channel."

will do. Also, do you have a fixes tag for this one ? Is it again:

Fixes: 669a5db411d8 ("[libata] Add a bunch of PATA drivers.")

?

> 
> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
> 
> ---
> This patch is against the 'for-next' branch of Damien Le Moal's 'libata.git'
> repo.
> 
>  drivers/ata/pata_hpt37x.c |   14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> Index: libata/drivers/ata/pata_hpt37x.c
> ===================================================================
> --- libata.orig/drivers/ata/pata_hpt37x.c
> +++ libata/drivers/ata/pata_hpt37x.c
> @@ -867,6 +867,20 @@ static int hpt37x_init_one(struct pci_de
>  	pci_write_config_byte(dev, 0x5a, irqmask);
>  
>  	/*
> +	 * HPT371 chips physically have only one channel, the secondary one,
> +	 * but the primary channel registers do exist!  Go figure...
> +	 * So,  we manually disable the non-existing channel here
> +	 * (if the BIOS hasn't done this already).
> +	 */
> +	if (dev->device == PCI_DEVICE_ID_TTI_HPT371) {
> +		u8 mcr1;
> +
> +		pci_read_config_byte(dev, 0x50, &mcr1);
> +		mcr1 &= ~0x04;
> +		pci_write_config_byte(dev, 0x50, mcr1);
> +	}
> +
> +	/*
>  	 * default to pci clock. make sure MA15/16 are set to output
>  	 * to prevent drives having problems with 40-pin cables. Needed
>  	 * for some drives such as IBM-DTLA which will not enter ready
Sergey Shtylyov Feb. 22, 2022, 9:48 a.m. UTC | #2
On 2/22/22 3:37 AM, Damien Le Moal wrote:

>> HPT371 chips physically have only one channel, the secondary one, however
>> the primary channel registers do exist!  Thus we have to manually disable
>> the non-existing channel (if the BIOS hasn't done this already).  Alan Cox
>> has only added such code to the 'pata_hpt3x2n' driver, forgetting about
>> this one... :-/
> 
> No need to assign blame by name :) Something more neutral like:
> 
> "Similarly to the pata_hpt3x2n driver, always disable the primary channel."

   Should I now repost?

> will do. Also, do you have a fixes tag for this one ? Is it again:
> 
> Fixes: 669a5db411d8 ("[libata] Add a bunch of PATA drivers.")> ?

   Yes.

>>
>> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>

[...]

MBR, Sergey
Damien Le Moal Feb. 22, 2022, 11:29 a.m. UTC | #3
On 2/22/22 18:48, Sergey Shtylyov wrote:
> On 2/22/22 3:37 AM, Damien Le Moal wrote:
> 
>>> HPT371 chips physically have only one channel, the secondary one, however
>>> the primary channel registers do exist!  Thus we have to manually disable
>>> the non-existing channel (if the BIOS hasn't done this already).  Alan Cox
>>> has only added such code to the 'pata_hpt3x2n' driver, forgetting about
>>> this one... :-/
>>
>> No need to assign blame by name :) Something more neutral like:
>>
>> "Similarly to the pata_hpt3x2n driver, always disable the primary channel."
> 
>    Should I now repost?

I will fix it up. No need to resend.

> 
>> will do. Also, do you have a fixes tag for this one ? Is it again:
>>
>> Fixes: 669a5db411d8 ("[libata] Add a bunch of PATA drivers.")> ?
> 
>    Yes.
> 
>>>
>>> Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
> 
> [...]
> 
> MBR, Sergey
Damien Le Moal Feb. 23, 2022, 12:43 a.m. UTC | #4
On 2/22/22 18:48, Sergey Shtylyov wrote:
> On 2/22/22 3:37 AM, Damien Le Moal wrote:
> 
>>> HPT371 chips physically have only one channel, the secondary one, however
>>> the primary channel registers do exist!  Thus we have to manually disable
>>> the non-existing channel (if the BIOS hasn't done this already).  Alan Cox
>>> has only added such code to the 'pata_hpt3x2n' driver, forgetting about
>>> this one... :-/
>>
>> No need to assign blame by name :) Something more neutral like:
>>
>> "Similarly to the pata_hpt3x2n driver, always disable the primary channel."
> 
>    Should I now repost?
> 
>> will do. Also, do you have a fixes tag for this one ? Is it again:
>>
>> Fixes: 669a5db411d8 ("[libata] Add a bunch of PATA drivers.")> ?
> 
>    Yes.

Applied to for-5.17-fixes with the commit message fixes. Thanks !
diff mbox series

Patch

Index: libata/drivers/ata/pata_hpt37x.c
===================================================================
--- libata.orig/drivers/ata/pata_hpt37x.c
+++ libata/drivers/ata/pata_hpt37x.c
@@ -867,6 +867,20 @@  static int hpt37x_init_one(struct pci_de
 	pci_write_config_byte(dev, 0x5a, irqmask);
 
 	/*
+	 * HPT371 chips physically have only one channel, the secondary one,
+	 * but the primary channel registers do exist!  Go figure...
+	 * So,  we manually disable the non-existing channel here
+	 * (if the BIOS hasn't done this already).
+	 */
+	if (dev->device == PCI_DEVICE_ID_TTI_HPT371) {
+		u8 mcr1;
+
+		pci_read_config_byte(dev, 0x50, &mcr1);
+		mcr1 &= ~0x04;
+		pci_write_config_byte(dev, 0x50, mcr1);
+	}
+
+	/*
 	 * default to pci clock. make sure MA15/16 are set to output
 	 * to prevent drives having problems with 40-pin cables. Needed
 	 * for some drives such as IBM-DTLA which will not enter ready