From patchwork Tue Apr 26 09:03:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 614862 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qvHWn48q5z9snm for ; Tue, 26 Apr 2016 19:16:05 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752170AbcDZJPk (ORCPT ); Tue, 26 Apr 2016 05:15:40 -0400 Received: from mga03.intel.com ([134.134.136.65]:41669 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752455AbcDZJDi (ORCPT ); Tue, 26 Apr 2016 05:03:38 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 26 Apr 2016 02:03:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,536,1455004800"; d="scan'208";a="953056393" Received: from black.fi.intel.com ([10.237.72.93]) by fmsmga001.fm.intel.com with ESMTP; 26 Apr 2016 02:03:26 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C3D9429E; Tue, 26 Apr 2016 12:03:25 +0300 (EEST) From: Andy Shevchenko To: Tejun Heo , linux-ide@vger.kernel.org, Rob Herring , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Christian Lamparter , =?UTF-8?q?M=C3=A5ns=20Rullg=C3=A5rd?= , Julian Margetson Cc: Andy Shevchenko Subject: [PATCH v2 04/23] ata: sata_dwc_460ex: burst size must be in items not bytes Date: Tue, 26 Apr 2016 12:03:05 +0300 Message-Id: <1461661404-1952-5-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1461661404-1952-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1461661404-1952-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org The burst size as defined by DMAengine API is in items of address width. Derive burst size from AHB_DMA_BRST_DFLT (64 bytes) by dividing it to DMA_SLAVE_BUSWIDTH_4_BYTES (4 bytes) that gives us 16 items. Tested-by: Christian Lamparter Signed-off-by: Andy Shevchenko --- drivers/ata/sata_dwc_460ex.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c index aee8873..4cac27d 100644 --- a/drivers/ata/sata_dwc_460ex.c +++ b/drivers/ata/sata_dwc_460ex.c @@ -65,7 +65,7 @@ #define NO_IRQ 0 #endif -#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/ +#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length */ enum { SATA_DWC_MAX_PORTS = 1, @@ -318,8 +318,8 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd } sconf.direction = qc->dma_dir; - sconf.src_maxburst = AHB_DMA_BRST_DFLT; - sconf.dst_maxburst = AHB_DMA_BRST_DFLT; + sconf.src_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */ + sconf.dst_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */ sconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; sconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;