From patchwork Thu Apr 23 20:27:50 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Svenning_S=C3=B8rensen?= X-Patchwork-Id: 464046 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id AAA5914012C for ; Fri, 24 Apr 2015 06:33:28 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030706AbbDWUd1 (ORCPT ); Thu, 23 Apr 2015 16:33:27 -0400 Received: from 4dim-gw.4dim.as ([81.7.137.98]:56615 "EHLO SECOEXCHANGE.secomea.local" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1030581AbbDWUd1 (ORCPT ); Thu, 23 Apr 2015 16:33:27 -0400 X-Greylist: delayed 326 seconds by postgrey-1.27 at vger.kernel.org; Thu, 23 Apr 2015 16:33:26 EDT Received: from [192.168.0.88] (178.157.255.235) by SECOEXCHANGE.secomea.local (10.1.104.10) with Microsoft SMTP Server (TLS) id 14.2.247.3; Thu, 23 Apr 2015 22:29:08 +0200 Message-ID: <553955C6.3030000@secomea.com> Date: Thu, 23 Apr 2015 22:27:50 +0200 From: =?windows-1252?Q?Svenning_S=F8rensen?= User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Wolfram Sang CC: Subject: [PATCH] i2c: scx200_acb: avoid I2C bus overclocking. X-Originating-IP: [178.157.255.235] Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org According to I2C spec, max SCL rate is 100 kHz, but SCx200/CS5536 controller is currently driving it at 214 kHz according to my math. SCL is derived from an input clock of 48 MHz, which must be divided by 480 (240 cycles for each SCL high/low state) to be within spec. Signed-off-by: Svenning Soerensen --- drivers/i2c/busses/scx200_acb.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c index 0a7e410..4def02d 100644 --- a/drivers/i2c/busses/scx200_acb.c +++ b/drivers/i2c/busses/scx200_acb.c @@ -46,6 +46,7 @@ module_param_array(base, int, NULL, 0); MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers"); #define POLL_TIMEOUT (HZ/5) +#define ACBCLK 240 /* 48 MHz / 100 kHz / 2 */ enum scx200_acb_state { state_idle, @@ -255,14 +256,14 @@ static void scx200_acb_poll(struct scx200_acb_iface *iface) static void scx200_acb_reset(struct scx200_acb_iface *iface) { /* Disable the ACCESS.bus device and Configure the SCL - frequency: 16 clock cycles */ - outb(0x70, ACBCTL2); + frequency: 240 clock cycles => 100 kHz */ + outb(ACBCLK, ACBCTL2); /* Polling mode */ outb(0, ACBCTL1); /* Disable slave address */ outb(0, ACBADDR); /* Enable the ACCESS.bus device */ - outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); + outb(ACBCLK | ACBCTL2_ENABLE, ACBCTL2); /* Free STALL after START */ outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1); /* Send a STOP */ @@ -390,10 +391,10 @@ static int scx200_acb_probe(struct scx200_acb_iface *iface) u8 val; /* Disable the ACCESS.bus device and Configure the SCL - frequency: 16 clock cycles */ - outb(0x70, ACBCTL2); + frequency: 240 clock cycles => 100 kHz*/ + outb(ACBCLK, ACBCTL2); - if (inb(ACBCTL2) != 0x70) { + if (inb(ACBCTL2) != ACBCLK) { pr_debug("ACBCTL2 readback failed\n"); return -ENXIO; } @@ -406,7 +407,7 @@ static int scx200_acb_probe(struct scx200_acb_iface *iface) return -ENXIO; } - outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2); + outb(ACBCLK | ACBCTL2_ENABLE, ACBCTL2); outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);