@@ -114,7 +114,6 @@ struct qcom_geni_device_data {
bool console;
enum geni_se_xfer_mode mode;
int (*resources_init)(struct geni_se *se);
- int (*set_rate)(struct geni_se *se, unsigned long baud);
int (*power_on)(struct geni_se *se);
int (*power_off)(struct geni_se *se);
};
@@ -1474,7 +1473,10 @@ static int geni_serial_set_rate(struct geni_se *se, unsigned long baud)
uport->uartclk = clk_rate;
port->clk_rate = clk_rate;
- dev_pm_opp_set_rate(uport->dev, clk_rate);
+ ret = geni_se_set_rate(&port->se, clk_rate);
+ if (ret)
+ return ret;
+
ser_clk_cfg = SER_CLK_EN;
ser_clk_cfg |= clk_div << CLK_DIV_SHFT;
@@ -1513,7 +1515,7 @@ static void qcom_geni_serial_set_termios(struct uart_port *uport,
/* baud rate */
baud = uart_get_baud_rate(uport, termios, old, 300, 8000000);
- ret = port->dev_data->set_rate(&port->se, baud);
+ ret = geni_serial_set_rate(&port->se, baud);
if (ret)
return;
@@ -2039,15 +2041,19 @@ static void qcom_geni_serial_remove(struct platform_device *pdev)
static int __maybe_unused qcom_geni_serial_runtime_suspend(struct device *dev)
{
struct qcom_geni_serial_port *port = dev_get_drvdata(dev);
+ int ret;
- return port->dev_data->power_off ?
- port->dev_data->power_off(&port->se) : 0;
+ ret = port->dev_data->power_off ?
+ port->dev_data->power_off(&port->se) : 0;
+ if (ret)
+ return ret;
+
+ return geni_se_set_rate(&port->se, 0);
}
static int __maybe_unused qcom_geni_serial_runtime_resume(struct device *dev)
{
struct qcom_geni_serial_port *port = dev_get_drvdata(dev);
- struct uart_port *uport = &port->uport;
int ret;
if (port->dev_data->power_on) {
@@ -2056,8 +2062,8 @@ static int __maybe_unused qcom_geni_serial_runtime_resume(struct device *dev)
return ret;
}
- if (port->se.has_opp && port->clk_rate)
- return dev_pm_opp_set_rate(uport->dev, port->clk_rate);
+ if (port->clk_rate)
+ return geni_se_set_rate(&port->se, port->clk_rate);
return 0;
}
@@ -2116,7 +2122,6 @@ static const struct qcom_geni_device_data qcom_geni_console_data = {
.console = true,
.mode = GENI_SE_FIFO,
.resources_init = geni_se_resources_init,
- .set_rate = geni_serial_set_rate,
.power_on = geni_se_resources_activate,
.power_off = geni_se_resources_deactivate,
};
@@ -2125,7 +2130,6 @@ static const struct qcom_geni_device_data sa8255p_qcom_geni_console_data = {
.console = true,
.mode = GENI_SE_FIFO,
.resources_init = geni_se_domain_attach,
- .set_rate = geni_se_set_perf_level,
};
#endif
@@ -2133,7 +2137,6 @@ static const struct qcom_geni_device_data qcom_geni_uart_data = {
.console = false,
.mode = GENI_SE_DMA,
.resources_init = geni_se_resources_init,
- .set_rate = geni_serial_set_rate,
.power_on = geni_se_resources_activate,
.power_off = geni_se_resources_deactivate,
};
@@ -2142,7 +2145,6 @@ static const struct qcom_geni_device_data sa8255p_qcom_geni_uart_data = {
.console = false,
.mode = GENI_SE_DMA,
.resources_init = geni_se_domain_attach,
- .set_rate = geni_se_set_perf_level,
};
static const struct dev_pm_ops qcom_geni_serial_pm_ops = {
On the SA8255P platform there is no Linux clock handler for the SE source clock, so the driver has no way to compute the divider needed for a requested baud rate. To work around this, firmware instead exposes the SE HW supported source clock frequencies as OPPs on the perf domain device. geni_se_domain_attach() now populates clk_perf_tbl from the performance-domain OPP table, allowing firmware-managed platforms to use geni_se_clk_freq_match(). Call geni_serial_set_rate() unconditionally from qcom_geni_serial_set_termios(), and use geni_se_set_rate() instead of dev_pm_opp_set_rate() so clock programming is handled centrally by the GENI core, independent of the underlying clock-control mechanism. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> --- drivers/tty/serial/qcom_geni_serial.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-)