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Fri, 23 Feb 2024 04:57:53 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 23 Feb 2024 04:57:51 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 23 Feb 2024 04:57:51 -0800 Received: from Dell2s-9.sclab.marvell.com (unknown [10.110.150.250]) by maili.marvell.com (Postfix) with ESMTP id 9ED193F70D0; Fri, 23 Feb 2024 04:57:50 -0800 (PST) From: Piyush Malgujar To: , , CC: , , , Piyush Malgujar Subject: [PATCH v4 3/4] i2c: octeon: Handle watchdog timeout Date: Fri, 23 Feb 2024 04:57:24 -0800 Message-ID: <20240223125725.1709624-4-pmalgujar@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240223125725.1709624-1-pmalgujar@marvell.com> References: <20240223125725.1709624-1-pmalgujar@marvell.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-GUID: ZFMqlN20SjT6PJboqfdFGzdRV-d37KY7 X-Proofpoint-ORIG-GUID: ZFMqlN20SjT6PJboqfdFGzdRV-d37KY7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-22_15,2024-02-23_01,2023-05-22_02 From: Suneel Garapati Add watchdog timeout handling to cater to the unhandled warnings seen during validation on boards with different I2C slaves. This status code reflects the state that controller couldn't receive any response from slave while being in non-idle state and HW recommends to reset before any further bus access. Signed-off-by: Suneel Garapati Signed-off-by: Piyush Malgujar Acked-by: Andi Shyti --- drivers/i2c/busses/i2c-octeon-core.c | 8 ++++++++ drivers/i2c/busses/i2c-octeon-core.h | 4 ++++ 2 files changed, 12 insertions(+) diff --git a/drivers/i2c/busses/i2c-octeon-core.c b/drivers/i2c/busses/i2c-octeon-core.c index 36e7beeab25c63c2341313d6aa3421049ad92990..7cc50fe6ad3d032241bf2cc2e49c0343b72a6c03 100644 --- a/drivers/i2c/busses/i2c-octeon-core.c +++ b/drivers/i2c/busses/i2c-octeon-core.c @@ -182,6 +182,7 @@ static int octeon_i2c_hlc_wait(struct octeon_i2c *i2c) static int octeon_i2c_check_status(struct octeon_i2c *i2c, int final_read) { u8 stat; + u64 mode; /* * This is ugly... in HLC mode the status is not in the status register @@ -244,6 +245,13 @@ static int octeon_i2c_check_status(struct octeon_i2c *i2c, int final_read) case STAT_RXADDR_NAK: case STAT_AD2W_NAK: return -ENXIO; + + case STAT_WDOG_TOUT: + mode = __raw_readq(i2c->twsi_base + MODE(i2c)); + /* Set BUS_MON_RST to reset bus monitor */ + mode |= BUS_MON_RST_MASK; + octeon_i2c_writeq_flush(mode, i2c->twsi_base + MODE(i2c)); + return -EIO; default: dev_err(i2c->dev, "unhandled state: %d\n", stat); return -EIO; diff --git a/drivers/i2c/busses/i2c-octeon-core.h b/drivers/i2c/busses/i2c-octeon-core.h index 5927d24926ce898efbee111046092960e48ce3ff..aa0a6cf6ad67185cd116a2d674dccf97c57600c1 100644 --- a/drivers/i2c/busses/i2c-octeon-core.h +++ b/drivers/i2c/busses/i2c-octeon-core.h @@ -72,6 +72,7 @@ #define STAT_SLAVE_ACK 0xC8 #define STAT_AD2W_ACK 0xD0 #define STAT_AD2W_NAK 0xD8 +#define STAT_WDOG_TOUT 0xF0 #define STAT_IDLE 0xF8 /* TWSI_INT values */ @@ -104,6 +105,9 @@ struct octeon_i2c_reg_offset { /* Set REFCLK_SRC and HS_MODE in TWSX_MODE register */ #define TWSX_MODE_HS_MASK (BIT(4) | BIT(0)) +/* Set BUS_MON_RST to reset bus monitor */ +#define BUS_MON_RST_MASK BIT(3) + struct octeon_i2c { wait_queue_head_t queue; struct i2c_adapter adap;