| Message ID | 20231128-i2c-qup-dvfs-v1-2-59a0e3039111@kernkonzept.com |
|---|---|
| State | New |
| Headers | show |
| Series | i2c: qup: Allow scaling power domains and interconnect | expand |
On Tue, 28 Nov 2023 10:48:36 +0100, Stephan Gerhold wrote: > When the I2C QUP controller is used together with a DMA engine it needs > to vote for the interconnect path to the DRAM. Otherwise it may be > unable to access the memory quickly enough. > > Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> > --- > Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml | 5 +++++ > 1 file changed, 5 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml index fc3077a7af0d..758d8f6321e1 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml @@ -40,6 +40,9 @@ properties: - const: tx - const: rx + interconnects: + maxItems: 1 + interrupts: maxItems: 1 @@ -73,6 +76,7 @@ unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-msm8998.h> + #include <dt-bindings/interconnect/qcom,msm8996.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/qcom-rpmpd.h> @@ -91,6 +95,7 @@ examples: pinctrl-1 = <&blsp1_i2c1_sleep>; power-domains = <&rpmpd MSM8909_VDDCX>; required-opps = <&rpmpd_opp_svs_krait>; + interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>; clock-frequency = <400000>; #address-cells = <1>;
When the I2C QUP controller is used together with a DMA engine it needs to vote for the interconnect path to the DRAM. Otherwise it may be unable to access the memory quickly enough. Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com> --- Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml | 5 +++++ 1 file changed, 5 insertions(+)