| Message ID | 20221213-sm6350-cci-v1-2-e5d0c36e0c4f@fairphone.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add CCI bus support for SM6350 | expand |
On 20.01.2023 12:11, Luca Weiss wrote: > Add a node for the camcc found on SM6350 SoC. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi > index 8224adb99948..300ced5cda57 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -1435,6 +1435,15 @@ usb_1_dwc3: usb@a600000 { > }; > }; > > + camcc: clock-controller@ad00000 { > + compatible = "qcom,sm6350-camcc"; > + reg = <0 0x0ad00000 0 0x16000>; > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > pdc: interrupt-controller@b220000 { > compatible = "qcom,sm6350-pdc", "qcom,pdc"; > reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x64>; >
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi index 8224adb99948..300ced5cda57 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1435,6 +1435,15 @@ usb_1_dwc3: usb@a600000 { }; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sm6350-camcc"; + reg = <0 0x0ad00000 0 0x16000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,sm6350-pdc", "qcom,pdc"; reg = <0 0x0b220000 0 0x30000>, <0 0x17c000f0 0 0x64>;
Add a node for the camcc found on SM6350 SoC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> --- arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)