| Message ID | 20220518202217.85803-1-dinguyen@kernel.org |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [1/2] i2c: designware: introduce a custom scl recovery for SoCFPGA platforms | expand |
On Wed, May 18, 2022 at 03:22:16PM -0500, Dinh Nguyen wrote: > The I2C pins on the SoCFPGA platforms do not go through a GPIO module, > thus cannot be recovered by the default method of by doing a GPIO access. > Only a reset of the I2C IP block can a recovery be successful. ... > #define MODEL_BAIKAL_BT1 BIT(9) > #define MODEL_AMD_NAVI_GPU BIT(10) > +#define MODEL_SOCFPGA BIT(11) ... > -#define MODEL_MASK GENMASK(11, 8) > +#define MODEL_MASK GENMASK(12, 8) Why this change is made? ... > + switch (dev->flags & MODEL_MASK) { > + case MODEL_SOCFPGA: > + rinfo->recover_bus = i2c_custom_scl_recovery; _custom_ is too broad, use exact name, i.e. i2c_socfpga_scl_recovery > + break; > + default: > + rinfo->recover_bus = i2c_generic_scl_recovery; > + break; > + } ... > + { .compatible = "intel,socfpga-i2c", .data = (void *)MODEL_SOCFPGA }, > + Stray change.
On 5/19/22 05:20, Andy Shevchenko wrote: > On Wed, May 18, 2022 at 03:22:16PM -0500, Dinh Nguyen wrote: >> The I2C pins on the SoCFPGA platforms do not go through a GPIO module, >> thus cannot be recovered by the default method of by doing a GPIO access. >> Only a reset of the I2C IP block can a recovery be successful. > > ... > >> #define MODEL_BAIKAL_BT1 BIT(9) >> #define MODEL_AMD_NAVI_GPU BIT(10) >> +#define MODEL_SOCFPGA BIT(11) > > ... > >> -#define MODEL_MASK GENMASK(11, 8) > >> +#define MODEL_MASK GENMASK(12, 8) > > Why this change is made? Sorry, mistake here..will remove. > > ... > >> + switch (dev->flags & MODEL_MASK) { >> + case MODEL_SOCFPGA: >> + rinfo->recover_bus = i2c_custom_scl_recovery; > > _custom_ is too broad, use exact name, i.e. > > i2c_socfpga_scl_recovery > Ok >> + break; >> + default: >> + rinfo->recover_bus = i2c_generic_scl_recovery; >> + break; >> + } > > ... > >> + { .compatible = "intel,socfpga-i2c", .data = (void *)MODEL_SOCFPGA }, > >> + > > Stray change. Will fix... Thanks for the review! Dinh >
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 70b80e710990..4e997e381fb6 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -303,7 +303,8 @@ struct dw_i2c_dev { #define MODEL_MSCC_OCELOT BIT(8) #define MODEL_BAIKAL_BT1 BIT(9) #define MODEL_AMD_NAVI_GPU BIT(10) -#define MODEL_MASK GENMASK(11, 8) +#define MODEL_SOCFPGA BIT(11) +#define MODEL_MASK GENMASK(12, 8) /* * Enable UCSI interrupt by writing 0xd at register diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busses/i2c-designware-master.c index 44a94b225ed8..333ad17b967d 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -813,12 +813,29 @@ static void i2c_dw_unprepare_recovery(struct i2c_adapter *adap) i2c_dw_init_master(dev); } +static int i2c_custom_scl_recovery(struct i2c_adapter *adap) +{ + i2c_dw_prepare_recovery(adap); + i2c_dw_unprepare_recovery(adap); + return 0; +} + static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev) { struct i2c_bus_recovery_info *rinfo = &dev->rinfo; struct i2c_adapter *adap = &dev->adapter; struct gpio_desc *gpio; + switch (dev->flags & MODEL_MASK) { + case MODEL_SOCFPGA: + rinfo->recover_bus = i2c_custom_scl_recovery; + break; + default: + rinfo->recover_bus = i2c_generic_scl_recovery; + break; + } + adap->bus_recovery_info = rinfo; + gpio = devm_gpiod_get_optional(dev->dev, "scl", GPIOD_OUT_HIGH); if (IS_ERR_OR_NULL(gpio)) return PTR_ERR_OR_ZERO(gpio); @@ -830,10 +847,8 @@ static int i2c_dw_init_recovery_info(struct dw_i2c_dev *dev) return PTR_ERR(gpio); rinfo->sda_gpiod = gpio; - rinfo->recover_bus = i2c_generic_scl_recovery; rinfo->prepare_recovery = i2c_dw_prepare_recovery; rinfo->unprepare_recovery = i2c_dw_unprepare_recovery; - adap->bus_recovery_info = rinfo; dev_info(dev->dev, "running with gpio recovery mode! scl%s", rinfo->sda_gpiod ? ",sda" : ""); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 70ade5306e45..92dfe3456ca7 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -153,6 +153,8 @@ static const struct of_device_id dw_i2c_of_match[] = { { .compatible = "snps,designware-i2c", }, { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT }, { .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 }, + { .compatible = "intel,socfpga-i2c", .data = (void *)MODEL_SOCFPGA }, + {}, }; MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
The I2C pins on the SoCFPGA platforms do not go through a GPIO module, thus cannot be recovered by the default method of by doing a GPIO access. Only a reset of the I2C IP block can a recovery be successful. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- drivers/i2c/busses/i2c-designware-core.h | 3 ++- drivers/i2c/busses/i2c-designware-master.c | 19 +++++++++++++++++-- drivers/i2c/busses/i2c-designware-platdrv.c | 2 ++ 3 files changed, 21 insertions(+), 3 deletions(-)