| Message ID | 20210614193253.10011-3-biju.das.jz@bp.renesas.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add RZ/G2L I2C support | expand |
On Mon, Jun 14, 2021 at 9:33 PM Biju Das <biju.das.jz@bp.renesas.com> wrote: > RZ/G2L i2c controller is compatible with RZ/A i2c controller. > By default IP is in reset state, so need to perform release > reset before accessing any register. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v1->v2 > * Changed to devm_reset_control_get_exclusive API for reset_control_get. > * Updated KCONFIG to enable RESET_CONTROLLER only if it is RZ/G2L SoC. > * Filled .data for RIIC_RZ_A. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert
On Mon, 2021-06-14 at 20:32 +0100, Biju Das wrote: > RZ/G2L i2c controller is compatible with RZ/A i2c controller. > By default IP is in reset state, so need to perform release > reset before accessing any register. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > --- > v1->v2 > * Changed to devm_reset_control_get_exclusive API for reset_control_get. > * Updated KCONFIG to enable RESET_CONTROLLER only if it is RZ/G2L SoC. > * Filled .data for RIIC_RZ_A. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> > --- > drivers/i2c/busses/Kconfig | 1 + > drivers/i2c/busses/i2c-riic.c | 23 ++++++++++++++++++++++- > 2 files changed, 23 insertions(+), 1 deletion(-) > > diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig > index 281a65d9b44b..17bd15ad8761 100644 > --- a/drivers/i2c/busses/Kconfig > +++ b/drivers/i2c/busses/Kconfig > @@ -941,6 +941,7 @@ config I2C_QUP > config I2C_RIIC > tristate "Renesas RIIC adapter" > depends on ARCH_RENESAS || COMPILE_TEST > + select RESET_CONTROLLER if ARCH_R9A07G044 I would have expected the select RESET_CONTROLLER to be placed under config ARCH_R9A07G044. Since this is a pretty architecture specific driver, I'm ok with this as well. regards Philipp
Hi Phillip, On Tue, Jun 15, 2021 at 9:49 AM Philipp Zabel <p.zabel@pengutronix.de> wrote: > On Mon, 2021-06-14 at 20:32 +0100, Biju Das wrote: > > RZ/G2L i2c controller is compatible with RZ/A i2c controller. > > By default IP is in reset state, so need to perform release > > reset before accessing any register. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > --- > > v1->v2 > > * Changed to devm_reset_control_get_exclusive API for reset_control_get. > > * Updated KCONFIG to enable RESET_CONTROLLER only if it is RZ/G2L SoC. > > * Filled .data for RIIC_RZ_A. > > Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> > > > --- > > drivers/i2c/busses/Kconfig | 1 + > > drivers/i2c/busses/i2c-riic.c | 23 ++++++++++++++++++++++- > > 2 files changed, 23 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig > > index 281a65d9b44b..17bd15ad8761 100644 > > --- a/drivers/i2c/busses/Kconfig > > +++ b/drivers/i2c/busses/Kconfig > > @@ -941,6 +941,7 @@ config I2C_QUP > > config I2C_RIIC > > tristate "Renesas RIIC adapter" > > depends on ARCH_RENESAS || COMPILE_TEST > > + select RESET_CONTROLLER if ARCH_R9A07G044 > > I would have expected the select RESET_CONTROLLER to be placed under > config ARCH_R9A07G044. Since this is a pretty architecture specific > driver, I'm ok with this as well. My first thought was "that would enable it unconditionally on ARCH_R9A07G044, even when RIIC is not used", but then I realized there's already a "select RESET_CONTROLLER" for CLK_RZG2L (in linux-next). So the select for I2C_RIIC can indeed be dropped. Gr{oetje,eeting}s, Geert
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 281a65d9b44b..17bd15ad8761 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -941,6 +941,7 @@ config I2C_QUP config I2C_RIIC tristate "Renesas RIIC adapter" depends on ARCH_RENESAS || COMPILE_TEST + select RESET_CONTROLLER if ARCH_R9A07G044 help If you say yes to this option, support will be included for the Renesas RIIC I2C interface. diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 4eccc0f69861..78b84445ee6a 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -42,8 +42,10 @@ #include <linux/io.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> +#include <linux/reset.h> #define RIIC_ICCR1 0x00 #define RIIC_ICCR2 0x04 @@ -86,6 +88,11 @@ #define RIIC_INIT_MSG -1 +enum riic_type { + RIIC_RZ_A, + RIIC_RZ_G2L, +}; + struct riic_dev { void __iomem *base; u8 *buf; @@ -395,7 +402,9 @@ static int riic_i2c_probe(struct platform_device *pdev) struct i2c_adapter *adap; struct resource *res; struct i2c_timings i2c_t; + struct reset_control *rstc; int i, ret; + enum riic_type type; riic = devm_kzalloc(&pdev->dev, sizeof(*riic), GFP_KERNEL); if (!riic) @@ -412,6 +421,17 @@ static int riic_i2c_probe(struct platform_device *pdev) return PTR_ERR(riic->clk); } + type = (enum riic_type)of_device_get_match_data(&pdev->dev); + if (type == RIIC_RZ_G2L) { + rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); + if (IS_ERR(rstc)) { + dev_err(&pdev->dev, "Error: missing reset ctrl\n"); + return PTR_ERR(rstc); + } + + reset_control_deassert(rstc); + } + for (i = 0; i < ARRAY_SIZE(riic_irqs); i++) { res = platform_get_resource(pdev, IORESOURCE_IRQ, riic_irqs[i].res_num); if (!res) @@ -472,7 +492,8 @@ static int riic_i2c_remove(struct platform_device *pdev) } static const struct of_device_id riic_i2c_dt_ids[] = { - { .compatible = "renesas,riic-rz" }, + { .compatible = "renesas,riic-r9a07g044", .data = (void *)RIIC_RZ_G2L }, + { .compatible = "renesas,riic-rz", .data = (void *)RIIC_RZ_A }, { /* Sentinel */ }, };