From patchwork Mon Nov 20 14:54:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yixun Lan X-Patchwork-Id: 839610 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3ygWx82PPFz9s4s for ; Tue, 21 Nov 2017 01:55:40 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751321AbdKTOzZ (ORCPT ); Mon, 20 Nov 2017 09:55:25 -0500 Received: from mail-sh2.amlogic.com ([58.32.228.45]:47234 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751170AbdKTOy4 (ORCPT ); Mon, 20 Nov 2017 09:54:56 -0500 Received: from localhost.localdomain (10.18.20.164) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Mon, 20 Nov 2017 22:54:19 +0800 From: Yixun Lan To: Wolfram Sang , Rob Herring , Mark Rutland , , , Kevin Hilman CC: Neil Armstrong , Jerome Brunet , Carlo Caione , Yixun Lan , Jian Hu , , , Subject: [PATCH v2 3/5] ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC Date: Mon, 20 Nov 2017 22:54:13 +0800 Message-ID: <20171120145415.6581-4-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171120145415.6581-1-yixun.lan@amlogic.com> References: <20171120145415.6581-1-yixun.lan@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.20.164] Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Jian Hu There are four I2C masters in EE domain, and one I2C Master in AO domain, the DT info here should describe them all. Signed-off-by: Jian Hu Signed-off-by: Yixun Lan --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 59 ++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 57faaa9d8013..b8ddec6e2cbe 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -129,6 +129,54 @@ #reset-cells = <1>; }; + i2c0: i2c@1f000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1f000 0x0 0x20>; + interrupts = , + ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + clock-names = "clk_i2c"; + }; + + i2c1: i2c@1e000 { + compatible = "amlogic,meson-axg-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x1e000 0x0 0x20>; + status = "disabled"; + interrupts = , + ; + clocks = <&clkc CLKID_I2C>; + clock-names = "clk_i2c"; + }; + + i2c2: i2c@1d000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1d000 0x0 0x20>; + interrupts = , + ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + clock-names = "clk_i2c"; + }; + + i2c3: i2c@1c000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x1c000 0x0 0x20>; + interrupts = , + ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + clock-names = "clk_i2c"; + }; + uart_A: serial@24000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; reg = <0x0 0x24000 0x0 0x14>; @@ -312,6 +360,17 @@ }; }; + i2c_AO: i2c@5000 { + compatible = "amlogic,meson-axg-i2c"; + status = "disabled"; + reg = <0x0 0x05000 0x0 0x20>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkc CLKID_I2C>; + clock-names = "clk_i2c"; + }; + uart_AO: serial@3000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; reg = <0x0 0x3000 0x0 0x18>;