From patchwork Wed Sep 30 08:47:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ludovic.desroches@atmel.com X-Patchwork-Id: 524176 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 7C32614029C for ; Wed, 30 Sep 2015 18:47:21 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754619AbbI3IrS (ORCPT ); Wed, 30 Sep 2015 04:47:18 -0400 Received: from eusmtp01.atmel.com ([212.144.249.242]:32312 "EHLO eusmtp01.atmel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754317AbbI3IrB (ORCPT ); Wed, 30 Sep 2015 04:47:01 -0400 Received: from ibiza.corp.atmel.com (10.161.101.13) by eusmtp01.atmel.com (10.161.101.30) with Microsoft SMTP Server id 14.3.235.1; Wed, 30 Sep 2015 10:46:54 +0200 From: Ludovic Desroches To: CC: , , , , , Wenyou Yang , Ludovic Desroches Subject: [PATCH 1/2] i2c: at91: add DT property for the HOLD field of TWIHS_CWGR Date: Wed, 30 Sep 2015 10:47:10 +0200 Message-ID: <1443602831-27069-1-git-send-email-ludovic.desroches@atmel.com> X-Mailer: git-send-email 2.5.0 MIME-Version: 1.0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Wenyou Yang Add the HOLD field setting in order to support I2C slave devices which need a longer hold time of the data. Since it depends on the slave devices connected to the bus, add a DT property "atmel,twd-hold-cycles" to specify this HOLD field. Signed-off-by: Wenyou Yang Signed-off-by: Ludovic Desroches Acked-by: Cyrille Pitchen --- drivers/i2c/busses/i2c-at91.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c index 1c758cd..06e66ef 100644 --- a/drivers/i2c/busses/i2c-at91.c +++ b/drivers/i2c/busses/i2c-at91.c @@ -64,6 +64,7 @@ #define AT91_TWI_IADR 0x000c /* Internal Address Register */ #define AT91_TWI_CWGR 0x0010 /* Clock Waveform Generator Reg */ +#define AT91_TWI_CWGR_HOLD(x) (((x) & 0x1f) << 24) #define AT91_TWI_SR 0x0020 /* Status Register */ #define AT91_TWI_TXCOMP BIT(0) /* Transmission Complete */ @@ -185,7 +186,8 @@ static void at91_init_twi_bus(struct at91_twi_dev *dev) * Calculate symmetric clock as stated in datasheet: * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset)) */ -static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk) +static void at91_calc_twi_clock(struct at91_twi_dev *dev, + int twi_clk, u32 twd_hold) { int ckdiv, cdiv, div; struct at91_twi_pdata *pdata = dev->pdata; @@ -204,7 +206,9 @@ static void at91_calc_twi_clock(struct at91_twi_dev *dev, int twi_clk) cdiv = 255; } - dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv; + dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv + | AT91_TWI_CWGR_HOLD(twd_hold); + dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv); } @@ -936,6 +940,7 @@ static int at91_twi_probe(struct platform_device *pdev) int rc; u32 phy_addr; u32 bus_clk_rate; + u32 twd_hold_cycles; dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL); if (!dev) @@ -992,7 +997,12 @@ static int at91_twi_probe(struct platform_device *pdev) if (rc) bus_clk_rate = DEFAULT_TWI_CLK_HZ; - at91_calc_twi_clock(dev, bus_clk_rate); + rc = of_property_read_u32(dev->dev->of_node, + "atmel,twd-hold-cycles", &twd_hold_cycles); + if (rc) + twd_hold_cycles = 0; + + at91_calc_twi_clock(dev, bus_clk_rate, twd_hold_cycles); at91_init_twi_bus(dev); snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91");