From patchwork Wed Mar 8 06:44:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 736475 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3vdPLN34pDz9s8W for ; Wed, 8 Mar 2017 17:50:52 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="AxTGBkQY"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755221AbdCHGuu (ORCPT ); Wed, 8 Mar 2017 01:50:50 -0500 Received: from mail-wr0-f194.google.com ([209.85.128.194]:33082 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755447AbdCHGus (ORCPT ); Wed, 8 Mar 2017 01:50:48 -0500 Received: by mail-wr0-f194.google.com with SMTP id g10so2861800wrg.0 for ; Tue, 07 Mar 2017 22:50:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:references:cc:from:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=7iiNM43MNezzchjKuXc+heFTl9DG3gmTXhNtgPsWG+w=; b=AxTGBkQYFp0Ao26yHlMC5LYpLGFICKMnQU4gp8zPhUHxcRESxXjadQUMdjv17oEdVT jtJrqhHX4NH7WAAu0jo8v03McQgHrSC5lwwMHc0Vy4c1ILDQfStDKpO78gmtS5kxXlK1 Gb5CgUcklDoQjx6nxgezIWxdsUaVj3iJ2S8HpYlceeOc5RJlruQbhU1WaZAD2AaXHJyU 30AdTGjcEmjbue1tOS7YQqtldirFejvgBj+XeIdreexb782ChCXtJLLjY++XgRgR+2Q8 yE6UGSvtlwLHJEGh2af4ht2/wOQ4szV7AKquz3kZgEYuhBVvDaSXAj1ULx+xs4f0ZxzI /Ubg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:references:cc:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=7iiNM43MNezzchjKuXc+heFTl9DG3gmTXhNtgPsWG+w=; b=lo2jui5DGwy+tbzzYzxlcoed2i3nLg8C8fZUMC8Dcc8ibV9fzGJg3vfuiLiuUUw9vo vz6n/VsQZMzncOdkYIpoKpKbOTJRt/DOX5/1WhyBCamE4YsyjO3d/SnJLtMgmMod2LPU puRwDUyBeF0qH5O/cquGFAlb7N1o9KxejeOfvq9EmPgjaUKDiMZs6YMHK6hWdiVzBzGD yc9hijqxD1qc5KqSES+/267ZHidvIcT8QvRwKpZxfuU4TtGU0nGtcEsbC6vYxRh8sRe5 SqDiIOcPGgRd5CNBc69fO1y82vWuQS7Ng9S8QFhdwIfDGkY6+zwiRdSHA7/Cr2sK2ycK fPUQ== X-Gm-Message-State: AMke39kwMtijrLH/58YaPiZNqeZLqBcgTp2nokv3SFr7FmvFb/C6Nw0xPbUngy4wewcZDw== X-Received: by 10.223.153.225 with SMTP id y88mr3537795wrb.81.1488955840705; Tue, 07 Mar 2017 22:50:40 -0800 (PST) Received: from ?IPv6:2003:c6:ebdc:4000:2c95:2fb7:1198:794b? (p200300C6EBDC40002C952FB71198794B.dip0.t-ipconnect.de. [2003:c6:ebdc:4000:2c95:2fb7:1198:794b]) by smtp.googlemail.com with ESMTPSA id x25sm2847911wrx.4.2017.03.07.22.50.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 Mar 2017 22:50:40 -0800 (PST) Subject: [PATCH 04/12] i2c: meson: use full 12 bits for clock divider To: Wolfram Sang References: Cc: "linux-i2c@vger.kernel.org" , linux-amlogic@lists.infradead.org From: Heiner Kallweit Message-ID: <0ea5a778-8769-50c2-35de-7136b6b407b6@gmail.com> Date: Wed, 8 Mar 2017 07:44:54 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The clock divider has 12 bits, splitted into a 10 bit field and a 2 bit field. The extra 2 bits aren't used currently. Change this to use the full 12 bits and warn if the requested frequency is too low. Signed-off-by: Heiner Kallweit Acked-by: Jerome Brunet --- drivers/i2c/busses/i2c-meson.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-meson.c b/drivers/i2c/busses/i2c-meson.c index 5e243efa..a5764be5 100644 --- a/drivers/i2c/busses/i2c-meson.c +++ b/drivers/i2c/busses/i2c-meson.c @@ -35,7 +35,9 @@ #define REG_CTRL_STATUS BIT(2) #define REG_CTRL_ERROR BIT(3) #define REG_CTRL_CLKDIV_SHIFT 12 -#define REG_CTRL_CLKDIV_MASK ((BIT(10) - 1) << REG_CTRL_CLKDIV_SHIFT) +#define REG_CTRL_CLKDIV_MASK GENMASK(21, 12) +#define REG_CTRL_CLKDIVEXT_SHIFT 28 +#define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28) #define I2C_TIMEOUT_MS 500 @@ -136,8 +138,15 @@ static void meson_i2c_set_clk_div(struct meson_i2c *i2c) unsigned int div; div = DIV_ROUND_UP(clk_rate, i2c->timings.bus_freq_hz * 4); + + /* clock divider has 12 bits */ + WARN_ON(div >= (1 << 12)); + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK, - div << REG_CTRL_CLKDIV_SHIFT); + (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); + + meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK, + (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__, clk_rate, i2c->timings.bus_freq_hz, div);