From patchwork Mon Mar 25 06:25:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 1063826 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Kf2q0kOf"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44SPP75KCXz9sSg for ; Mon, 25 Mar 2019 17:24:27 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729710AbfCYGY1 (ORCPT ); Mon, 25 Mar 2019 02:24:27 -0400 Received: from mail-pg1-f193.google.com ([209.85.215.193]:34499 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729604AbfCYGY1 (ORCPT ); Mon, 25 Mar 2019 02:24:27 -0400 Received: by mail-pg1-f193.google.com with SMTP id v12so5780143pgq.1; Sun, 24 Mar 2019 23:24:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=lo/y4LVrDbirngV8ZQJtGQjH8jQRyE53ymUz3wq08xM=; b=Kf2q0kOf3jDuYOqZ2HdDbras2I8Gdg3L3X3+enOFu39j1vrFi3QFyZzWzlQxbJeySx A95P6ihz+hGY9n84Lx99Zui99Xg1Bha3sq/c5Eft/XwOI698ClzA7ueeqPe2FirIVHUp 6f/IW+80bumuBuYsPxK09nP13pTyhbjX8sgjU18UqkSP8b/EXqouNHSK83xKISXSWBuP /fvbPi+xt4MiLNhzV1lHQITepzgOZEPAvFpJ0pH8kVp5iV/BWijgcNgNj7HhqeC0NbJW r6T7ovxfG4hlUbf3UEZ4W+qvoGbuSxrUXoiODIJWFip09WdcJYWaw0Qbn5dRgcLA13Kn wJcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=lo/y4LVrDbirngV8ZQJtGQjH8jQRyE53ymUz3wq08xM=; b=tJJxfTghiXStku72xVgYL+Ukrs7IVWfRTuRRa2CBf3r+JqEOXT5YUuKuupJXwcoyms zyPmfAR3UvDxiQot8EO1plQg8XKTpXDgKBYxaTmm+0H9Gdp7w41O9Okiksmye2omJoxD 7RaradRtPh2BQLDxYUX8uY3OHar80Ys89T9WIje4+tkpGYBWawxvQsddaqusuHdGY9Yg F51wocjtusr7Wz9PTqwoj1k/2oM1yeyMKBdTLqmPa0o1hfknnVd9RPu3EgI98MoHd9CF hKT0RHslLc8hX2LWPcWQ+XjBcIMY0+HMhncVEnviM4ENyvKOzNvP/bZeqM0OMvMNGj/r GS6A== X-Gm-Message-State: APjAAAUGUyk5St2sJLt00Naurj90X/1ijFEjKsP4lLaJmDEVMJifywTw 8ZHVk59m25RZzvkHMjNM/go= X-Google-Smtp-Source: APXvYqw3uP6LxLY8CpyAO9NWeLE1ZxzPvnGUhrQcJVKzWywfIRImSi8/5go3T0WE8TM8XIZYV+2yIA== X-Received: by 2002:a63:4750:: with SMTP id w16mr22197719pgk.256.1553495066164; Sun, 24 Mar 2019 23:24:26 -0700 (PDT) Received: from localhost.localdomain ([2001:268:c0a5:e068:c70:4af9:86e2:2]) by smtp.gmail.com with ESMTPSA id g6sm21853059pgq.54.2019.03.24.23.24.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 24 Mar 2019 23:24:25 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org, bgolaszewski@baylibre.com Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, yamada.masahiro@socionext.com, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, geert@linux-m68k.org, preid@electromag.com.au, William Breathitt Gray Subject: [PATCH v12 08/11] gpio: pcie-idio-24: Utilize for_each_set_clump8 macro Date: Mon, 25 Mar 2019 15:25:22 +0900 Message-Id: X-Mailer: git-send-email 2.21.0 In-Reply-To: References: MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pcie-idio-24.c | 111 ++++++++++++------------------- 1 file changed, 42 insertions(+), 69 deletions(-) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index 52f1647a46fd..2ceff1f5d8fd 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -198,52 +198,35 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - size_t i; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); - unsigned long port_state; + unsigned int offset; + unsigned long gpio_mask; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23, &idio24gpio->reg->in0_7, &idio24gpio->reg->in8_15, &idio24gpio->reg->in16_23, }; + const unsigned int ngpio = ARRAY_SIZE(ports) * 8; + size_t index; + unsigned long port_state; const unsigned long out_mode_mask = BIT(1); /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports) + 1; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } + for_each_set_clump8(offset, gpio_mask, mask, ngpio) { + index = offset / 8; /* read bits from current gpio port (port 6 is TTL GPIO) */ - if (i < 6) - port_state = ioread8(ports[i]); + if (index < 6) + port_state = ioread8(ports[index]); else if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) port_state = ioread8(&idio24gpio->reg->ttl_out0_7); else port_state = ioread8(&idio24gpio->reg->ttl_in0_7); - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + port_state &= gpio_mask; + + bitmap_set_value8(bits, ngpio, port_state, offset); } return 0; @@ -294,59 +277,49 @@ static void idio_24_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); - size_t i; - unsigned long bits_offset; + unsigned int offset; unsigned long gpio_mask; - const unsigned int gpio_reg_size = 8; - const unsigned long port_mask = GENMASK(gpio_reg_size, 0); - unsigned long flags; - unsigned int out_state; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23 }; + const unsigned int ngpio = ARRAY_SIZE(ports) * 8; + size_t index; + unsigned int bitmask; + unsigned long flags; + unsigned int out_state; const unsigned long out_mode_mask = BIT(1); - const unsigned int ttl_offset = 48; - const size_t ttl_i = BIT_WORD(ttl_offset); - const unsigned int word_offset = ttl_offset % BITS_PER_LONG; - const unsigned long ttl_mask = (mask[ttl_i] >> word_offset) & port_mask; - const unsigned long ttl_bits = (bits[ttl_i] >> word_offset) & ttl_mask; - - /* set bits are processed a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* check if any set bits for current port */ - gpio_mask = (*mask >> bits_offset) & port_mask; - if (!gpio_mask) { - /* no set bits for this port so move on to next port */ - continue; - } - raw_spin_lock_irqsave(&idio24gpio->lock, flags); + for_each_set_clump8(offset, gpio_mask, mask, ngpio) { + index = offset / 8; - /* process output lines */ - out_state = ioread8(ports[i]) & ~gpio_mask; - out_state |= (*bits >> bits_offset) & gpio_mask; - iowrite8(out_state, ports[i]); + bitmask = bitmap_get_value8(bits, ngpio, offset) & gpio_mask; - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); - } + raw_spin_lock_irqsave(&idio24gpio->lock, flags); - /* check if setting TTL lines and if they are in output mode */ - if (!ttl_mask || !(ioread8(&idio24gpio->reg->ctl) & out_mode_mask)) - return; + /* read bits from current gpio port (port 6 is TTL GPIO) */ + if (index < 6) { + out_state = ioread8(ports[index]); + } else if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) { + out_state = ioread8(&idio24gpio->reg->ttl_out0_7); + } else { + /* skip TTL GPIO if set for input */ + raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); + continue; + } - /* handle TTL output */ - raw_spin_lock_irqsave(&idio24gpio->lock, flags); + /* set requested bit states */ + out_state &= ~gpio_mask; + out_state |= bitmask; - /* process output lines */ - out_state = ioread8(&idio24gpio->reg->ttl_out0_7) & ~ttl_mask; - out_state |= ttl_bits; - iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); + /* write bits for current gpio port (port 6 is TTL GPIO) */ + if (index < 6) + iowrite8(out_state, ports[index]); + else + iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); + raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); + } } static void idio_24_irq_ack(struct irq_data *data)