mbox series

[GIT,PULL] intel-pinctrl for 6.2-2

Message ID Y30YOvHpqvte9otX@black.fi.intel.com
State New
Headers show
Series [GIT,PULL] intel-pinctrl for 6.2-2 | expand

Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git tags/intel-pinctrl-v6.2-2

Message

Andy Shevchenko Nov. 22, 2022, 6:43 p.m. UTC
Hi Linux pin control and PWM maintainers,

This is an immutable tag with PWM feature enablement for Intel pin control IPs.
It's targeting v6.2 and have been reviewed by all stakeholders.

The idea is that PWM and pin control subsystem soak up it independently.

Thanks,

With Best Regards,
Andy Shevchenko

The following changes since commit 9abf2313adc1ca1b6180c508c25f22f9395cc780:

  Linux 6.1-rc1 (2022-10-16 15:36:24 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel.git tags/intel-pinctrl-v6.2-2

for you to fetch changes up to eb78d3604d6bcbe9743e036114c33a5a17090a0a:

  pinctrl: intel: Enumerate PWM device when community has a capability (2022-11-22 20:34:02 +0200)

----------------------------------------------------------------
intel-pinctrl for v6.2-2

* Enable PWM feature on Intel pin control IPs

The following is an automated git shortlog grouped by driver:

intel:
 -  Enumerate PWM device when community has a capability

pwm:
 -  lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe()
 -  lpss: Allow other drivers to enable PWM LPSS
 -  lpss: Include headers we are the direct user of
 -  lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS
 -  Add a stub for devm_pwmchip_add()

----------------------------------------------------------------
Andy Shevchenko (6):
      pwm: Add a stub for devm_pwmchip_add()
      pwm: lpss: Rename MAX_PWMS --> LPSS_MAX_PWMS
      pwm: lpss: Include headers we are the direct user of
      pwm: lpss: Allow other drivers to enable PWM LPSS
      pwm: lpss: Rename pwm_lpss_probe() --> devm_pwm_lpss_probe()
      pinctrl: intel: Enumerate PWM device when community has a capability

 drivers/pinctrl/intel/pinctrl-intel.c      | 29 ++++++++++++++++++++++++++
 drivers/pwm/pwm-lpss-pci.c                 |  2 +-
 drivers/pwm/pwm-lpss-platform.c            |  2 +-
 drivers/pwm/pwm-lpss.c                     |  8 ++++----
 drivers/pwm/pwm-lpss.h                     | 26 ++++-------------------
 include/linux/platform_data/x86/pwm-lpss.h | 33 ++++++++++++++++++++++++++++++
 include/linux/pwm.h                        |  5 +++++
 7 files changed, 77 insertions(+), 28 deletions(-)
 create mode 100644 include/linux/platform_data/x86/pwm-lpss.h

Comments

Linus Walleij Nov. 28, 2022, 8:25 p.m. UTC | #1
On Tue, Nov 22, 2022 at 7:42 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:

> This is an immutable tag with PWM feature enablement for Intel pin control IPs.
> It's targeting v6.2 and have been reviewed by all stakeholders.
>
> The idea is that PWM and pin control subsystem soak up it independently.

I wanted to give Thierry the option to say if he's pulling this in,
but it needs rotation in linux-next so I've pulled it into the pin
control tree now.

Yours,
Linus Walleij
Andy Shevchenko Nov. 29, 2022, 11:53 a.m. UTC | #2
On Mon, Nov 28, 2022 at 09:25:02PM +0100, Linus Walleij wrote:
> On Tue, Nov 22, 2022 at 7:42 PM Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> 
> > This is an immutable tag with PWM feature enablement for Intel pin control IPs.
> > It's targeting v6.2 and have been reviewed by all stakeholders.
> >
> > The idea is that PWM and pin control subsystem soak up it independently.
> 
> I wanted to give Thierry the option to say if he's pulling this in,
> but it needs rotation in linux-next so I've pulled it into the pin
> control tree now.

Thank you!

Note, that Thierry and Uwe gave their respective tags to the patches.
Thierry Reding Nov. 29, 2022, noon UTC | #3
On Mon, Nov 28, 2022 at 09:25:02PM +0100, Linus Walleij wrote:
> On Tue, Nov 22, 2022 at 7:42 PM Andy Shevchenko
> <andriy.shevchenko@linux.intel.com> wrote:
> 
> > This is an immutable tag with PWM feature enablement for Intel pin control IPs.
> > It's targeting v6.2 and have been reviewed by all stakeholders.
> >
> > The idea is that PWM and pin control subsystem soak up it independently.
> 
> I wanted to give Thierry the option to say if he's pulling this in,
> but it needs rotation in linux-next so I've pulled it into the pin
> control tree now.

My recollection is that Andy wanted to take this through the Intel pin
control tree, so there's no need for me to pick this up as well unless
perhaps for conflict resolution (which I'm not seeing right now).

Thierry
Andy Shevchenko Nov. 29, 2022, 12:16 p.m. UTC | #4
On Tue, Nov 29, 2022 at 01:00:01PM +0100, Thierry Reding wrote:
> On Mon, Nov 28, 2022 at 09:25:02PM +0100, Linus Walleij wrote:
> > On Tue, Nov 22, 2022 at 7:42 PM Andy Shevchenko
> > <andriy.shevchenko@linux.intel.com> wrote:
> > 
> > > This is an immutable tag with PWM feature enablement for Intel pin control IPs.
> > > It's targeting v6.2 and have been reviewed by all stakeholders.
> > >
> > > The idea is that PWM and pin control subsystem soak up it independently.
> > 
> > I wanted to give Thierry the option to say if he's pulling this in,
> > but it needs rotation in linux-next so I've pulled it into the pin
> > control tree now.
> 
> My recollection is that Andy wanted to take this through the Intel pin
> control tree, so there's no need for me to pick this up as well unless
> perhaps for conflict resolution (which I'm not seeing right now).

The idea was to have an immutable tag that all parties, who are involved,
can pull. It means if you don't need it, it's fine, since the main route
is Intel pin control as you said.

Thank you!