diff mbox series

[DO,NOT,APPLY,v7,06/10] pinctrl: renesas: rzg2l-poeg: output-disable request from GPT when both outputs are low.

Message ID 20230328101011.185594-7-biju.das.jz@bp.renesas.com
State New
Headers show
Series Add RZ/G2L POEG support | expand

Commit Message

Biju Das March 28, 2023, 10:10 a.m. UTC 
This patch adds support for output-disable requests from GPT, when both
outputs are low.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 drivers/pinctrl/renesas/poeg/rzg2l-poeg.c | 11 +++++++++++
 include/linux/pinctrl/rzg2l-poeg.h        |  1 +
 2 files changed, 12 insertions(+)
diff mbox series

Patch

diff --git a/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c b/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c
index 2683930309ca..b66d717d6bf4 100644
--- a/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c
+++ b/drivers/pinctrl/renesas/poeg/rzg2l-poeg.c
@@ -88,6 +88,10 @@  static void rzg2l_poeg_config_irq(struct rzg2l_poeg_chip *chip)
 {
 	if (test_bit(RZG2L_GPT_OABHF, chip->gpt_irq))
 		rzg2l_gpt_poeg_disable_req_both_high(chip->gpt_dev, chip->index, true);
+
+	if (test_bit(RZG2L_GPT_OABLF, chip->gpt_irq))
+		rzg2l_gpt_poeg_disable_req_both_low(chip->gpt_dev, chip->index, true);
+
 }
 
 static irqreturn_t rzg2l_poeg_irq(int irq, void *ptr)
@@ -349,6 +353,13 @@  static int rzg2l_poeg_probe(struct platform_device *pdev)
 		case POEG_GPT_BOTH_HIGH:
 			assign_bit(RZG2L_GPT_OABHF, chip->gpt_irq, true);
 			break;
+		case POEG_GPT_BOTH_LOW:
+			assign_bit(RZG2L_GPT_OABLF, chip->gpt_irq, true);
+			break;
+		case POEG_GPT_BOTH_HIGH_LOW:
+			assign_bit(RZG2L_GPT_OABHF, chip->gpt_irq, true);
+			assign_bit(RZG2L_GPT_OABLF, chip->gpt_irq, true);
+			break;
 		default:
 			ret = -EINVAL;
 			goto err_pm;
diff --git a/include/linux/pinctrl/rzg2l-poeg.h b/include/linux/pinctrl/rzg2l-poeg.h
index d21b70c219e6..e1e0ba5b47a1 100644
--- a/include/linux/pinctrl/rzg2l-poeg.h
+++ b/include/linux/pinctrl/rzg2l-poeg.h
@@ -5,6 +5,7 @@ 
 #include <linux/types.h>
 
 #define RZG2L_GPT_OABHF	1
+#define RZG2L_GPT_OABLF	2
 
 #define RZG2L_POEG_USR_CTRL_ENABLE_CMD	0
 #define RZG2L_POEG_USR_CTRL_DISABLE_CMD	1