| Message ID | 20220526012946.3862776-4-chris.packham@alliedtelesis.co.nz |
|---|---|
| State | New |
| Headers | show |
| Series | dt-bindings: gpio: gpio-mvebu: Convert to DT schema format | expand |
On Thu, May 26, 2022 at 01:29:46PM +1200, Chris Packham wrote: > The offset and marvell,pwm-offset properties weren't in the old binding. > Add them based on the existing usage in the driver and board DTS when > the marvell,armada-8k-gpio compatible is used. > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > > Notes: > Changes in v4: > - Reword commit message slightly > - Add review from Krzysztof > Changes in v3: > - Split off from 1:1 conversion patch > > Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > index 459ec35864fe..f1bd1e6b2e1f 100644 > --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > @@ -45,6 +45,10 @@ properties: > - const: pwm > minItems: 1 > > + offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Offset in the register map for the gpio registers (in bytes) > + > interrupts: > description: | > The list of interrupts that are used for all the pins managed by this > @@ -68,6 +72,10 @@ properties: > "#gpio-cells": > const: 2 > > + marvell,pwm-offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Offset in the register map for the pwm registers (in bytes) > + Seems to match reality (in the driver and some dtsi files). Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Best regards Uwe
On Thu, May 26, 2022 at 01:29:46PM +1200, Chris Packham wrote: > The offset and marvell,pwm-offset properties weren't in the old binding. > Add them based on the existing usage in the driver and board DTS when > the marvell,armada-8k-gpio compatible is used. > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > > Notes: > Changes in v4: > - Reword commit message slightly > - Add review from Krzysztof > Changes in v3: > - Split off from 1:1 conversion patch > > Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > index 459ec35864fe..f1bd1e6b2e1f 100644 > --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml > @@ -45,6 +45,10 @@ properties: > - const: pwm > minItems: 1 > > + offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Offset in the register map for the gpio registers (in bytes) > + > interrupts: > description: | > The list of interrupts that are used for all the pins managed by this > @@ -68,6 +72,10 @@ properties: > "#gpio-cells": > const: 2 > > + marvell,pwm-offset: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: Offset in the register map for the pwm registers (in bytes) > + It would probably have been better to add multiple compatible strings to hide parameters like this, but given that this has been in the DTS files for more than a year at this point, it's probably too late now. Acked-by: Thierry Reding <thierry.reding@gmail.com> Linus, Bartosz, will you pick up the series into the GPIO tree? Thierry
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml index 459ec35864fe..f1bd1e6b2e1f 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml @@ -45,6 +45,10 @@ properties: - const: pwm minItems: 1 + offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the gpio registers (in bytes) + interrupts: description: | The list of interrupts that are used for all the pins managed by this @@ -68,6 +72,10 @@ properties: "#gpio-cells": const: 2 + marvell,pwm-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the pwm registers (in bytes) + "#pwm-cells": description: The first cell is the GPIO line number. The second cell is the period