diff mbox series

[RFT,3/4] arm64: dts: qcom: correct interrupt controller on PM8916 and PMS405

Message ID 20220508135932.132378-4-krzysztof.kozlowski@linaro.org
State New
Headers show
Series dt-bindings/pinctrl/arm: qcom: second round of minor cleanups of QCOM PMIC pinctrl | expand

Commit Message

Krzysztof Kozlowski May 8, 2022, 1:59 p.m. UTC 
The PM8916 and PMS405 PMIC GPIOs are interrupt controllers, as described
in the bindings and used by the driver.  Drop the interrupts (apparently
copied from downstream tree), just like in commit 61d2ca503d0b ("arm64:
dts: qcom: fix pm8150 gpio interrupts"):

  qcs404-evb-4000.dtb: gpio@c000: 'interrupts' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
  qcs404-evb-4000.dtb: gpio@c000: 'interrupt-controller' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 arch/arm64/boot/dts/qcom/pm8916.dtsi |  6 ++----
 arch/arm64/boot/dts/qcom/pms405.dtsi | 14 ++------------
 2 files changed, 4 insertions(+), 16 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
index d52919a8c0b0..0b6e8ad7fa50 100644
--- a/arch/arm64/boot/dts/qcom/pm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -113,10 +113,8 @@  pm8916_gpios: gpios@c000 {
 			gpio-controller;
 			gpio-ranges = <&pm8916_gpios 0 0 4>;
 			#gpio-cells = <2>;
-			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
-				     <0 0xc1 0 IRQ_TYPE_NONE>,
-				     <0 0xc2 0 IRQ_TYPE_NONE>,
-				     <0 0xc3 0 IRQ_TYPE_NONE>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/qcom/pms405.dtsi b/arch/arm64/boot/dts/qcom/pms405.dtsi
index 26f1e8cc9c6c..634b0681d04c 100644
--- a/arch/arm64/boot/dts/qcom/pms405.dtsi
+++ b/arch/arm64/boot/dts/qcom/pms405.dtsi
@@ -43,18 +43,8 @@  pms405_gpios: gpio@c000 {
 			gpio-controller;
 			gpio-ranges = <&pms405_gpios 0 0 12>;
 			#gpio-cells = <2>;
-			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
-				<0 0xc1 0 IRQ_TYPE_NONE>,
-				<0 0xc2 0 IRQ_TYPE_NONE>,
-				<0 0xc3 0 IRQ_TYPE_NONE>,
-				<0 0xc4 0 IRQ_TYPE_NONE>,
-				<0 0xc5 0 IRQ_TYPE_NONE>,
-				<0 0xc6 0 IRQ_TYPE_NONE>,
-				<0 0xc7 0 IRQ_TYPE_NONE>,
-				<0 0xc8 0 IRQ_TYPE_NONE>,
-				<0 0xc9 0 IRQ_TYPE_NONE>,
-				<0 0xca 0 IRQ_TYPE_NONE>,
-				<0 0xcb 0 IRQ_TYPE_NONE>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 		};
 
 		pon@800 {