From patchwork Fri Oct 22 12:40:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Shih X-Patchwork-Id: 1544916 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HbP9647ksz9sSf for ; Fri, 22 Oct 2021 23:41:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232912AbhJVMn2 (ORCPT ); Fri, 22 Oct 2021 08:43:28 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:39140 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S232564AbhJVMnK (ORCPT ); Fri, 22 Oct 2021 08:43:10 -0400 X-UUID: ab8199e755454b2a874eaf5e838e175b-20211022 X-UUID: ab8199e755454b2a874eaf5e838e175b-20211022 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1221396786; Fri, 22 Oct 2021 20:40:50 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 22 Oct 2021 20:40:49 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 22 Oct 2021 20:40:49 +0800 From: Sam Shih To: Linus Walleij , Rob Herring , Matthias Brugger , Sean Wang , , , , , CC: John Crispin , Ryder Lee , "Sam Shih" Subject: [PATCH v9 4/4] arm64: dts: mediatek: add pinctrl support for mt7986b Date: Fri, 22 Oct 2021 20:40:36 +0800 Message-ID: <20211022124036.5291-5-sam.shih@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211022124036.5291-1-sam.shih@mediatek.com> References: <20211022124036.5291-1-sam.shih@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add mt7986b pinctrl node Signed-off-by: Sam Shih --- arch/arm64/boot/dts/mediatek/mt7986b.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi index c3e56ea18638..2c873313e7a4 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi @@ -128,6 +128,27 @@ apmixedsys: apmixedsys@1001e000 { #clock-cells = <1>; }; + pio: pinctrl@1001f000 { + compatible = "mediatek,mt7986b-pinctrl"; + reg = <0 0x1001f000 0 0x1000>, + <0 0x11c30000 0 0x1000>, + <0 0x11c40000 0 0x1000>, + <0 0x11e20000 0 0x1000>, + <0 0x11e30000 0 0x1000>, + <0 0x11f00000 0 0x1000>, + <0 0x11f10000 0 0x1000>, + <0 0x1000b000 0 0x1000>; + reg-names = "gpio", "iocfg_rt", "iocfg_rb", "iocfg_lt", + "iocfg_lb", "iocfg_tr", "iocfg_tl", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 41>, <&pio 66 66 35>; + interrupt-controller; + interrupts = ; + interrupt-parent = <&gic>; + #interrupt-cells = <2>; + }; + sgmiisys0: syscon@10060000 { compatible = "mediatek,mt7986-sgmiisys_0", "syscon";