| Message ID | 20210712194422.12405-6-prabhakar.mahadev-lad.rj@bp.renesas.com |
|---|---|
| State | New |
| Headers | show |
| Series | pin and gpio controller driver for Renesas RZ/G2L | expand |
On 12.07.2021 22:44, Lad Prabhakar wrote: > Add scif0 pins in pinctrl node and update the scif0 node > to include pinctrl property. Properties? There are a couple... :-) > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > index adcd4f50519e..0987163f25ee 100644 > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi [...] > clock-frequency = <24000000>; > }; > > +&pinctrl { > + scif0_pins: scif0 { > + pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ > + <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ > + }; > +}; > + > &scif0 { > + pinctrl-0 = <&scif0_pins>; > + pinctrl-names = "default"; > status = "okay"; > }; > MBR, Sergei
Hi Sergei, Thank you for the review. On Tue, Jul 13, 2021 at 12:18 PM Sergei Shtylyov <sergei.shtylyov@gmail.com> wrote: > > On 12.07.2021 22:44, Lad Prabhakar wrote: > > > Add scif0 pins in pinctrl node and update the scif0 node > > to include pinctrl property. > > Properties? There are a couple... :-) > Agreed will update the commit message. Cheers, Prabhakar > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > > index adcd4f50519e..0987163f25ee 100644 > > --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > > +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi > [...] > > clock-frequency = <24000000>; > > }; > > > > +&pinctrl { > > + scif0_pins: scif0 { > > + pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ > > + <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ > > + }; > > +}; > > + > > &scif0 { > > + pinctrl-0 = <&scif0_pins>; > > + pinctrl-names = "default"; > > status = "okay"; > > }; > > > > MBR, Sergei
diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi index adcd4f50519e..0987163f25ee 100644 --- a/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi @@ -6,6 +6,7 @@ */ #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> / { aliases { @@ -22,6 +23,15 @@ clock-frequency = <24000000>; }; +&pinctrl { + scif0_pins: scif0 { + pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */ + <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */ + }; +}; + &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; status = "okay"; };