| Message ID | 20210603101822.9645-3-steven_lee@aspeedtech.com |
|---|---|
| State | New |
| Headers | show |
| Series | ASPEED sgpio driver enhancement. | expand |
On Thu, 3 Jun 2021, at 19:48, Steven Lee wrote: > AST2600 supports 2 SGPIO master interfaces one with 128 pins another one > with 80 pins. > > Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> > --- > arch/arm/boot/dts/aspeed-g6.dtsi | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi > index f96607b7b4e2..e56e92e206f1 100644 > --- a/arch/arm/boot/dts/aspeed-g6.dtsi > +++ b/arch/arm/boot/dts/aspeed-g6.dtsi > @@ -377,6 +377,36 @@ > #interrupt-cells = <2>; > }; > > + sgpiom0: sgpiom@1e780500 { > + #gpio-cells = <2>; > + gpio-controller; > + compatible = "aspeed,ast2600-sgpiom1"; See my comment on the compatible names on the binding document. Andrew
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index f96607b7b4e2..e56e92e206f1 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -377,6 +377,36 @@ #interrupt-cells = <2>; }; + sgpiom0: sgpiom@1e780500 { + #gpio-cells = <2>; + gpio-controller; + compatible = "aspeed,ast2600-sgpiom1"; + reg = <0x1e780500 0x100>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + ngpios = <128>; + clocks = <&syscon ASPEED_CLK_APB2>; + interrupt-controller; + bus-frequency = <12000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sgpm1_default>; + status = "disabled"; + }; + + sgpiom1: sgpiom@1e780600 { + #gpio-cells = <2>; + gpio-controller; + compatible = "aspeed,ast2600-sgpiom2"; + reg = <0x1e780600 0x100>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + ngpios = <80>; + clocks = <&syscon ASPEED_CLK_APB2>; + interrupt-controller; + bus-frequency = <12000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sgpm2_default>; + status = "disabled"; + }; + gpio1: gpio@1e780800 { #gpio-cells = <2>; gpio-controller;
AST2600 supports 2 SGPIO master interfaces one with 128 pins another one with 80 pins. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> --- arch/arm/boot/dts/aspeed-g6.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)