From patchwork Wed Dec 2 16:34:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 1409836 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=xufwbiyf; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CmPkK58czz9sSf for ; Thu, 3 Dec 2020 03:36:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727942AbgLBQgZ (ORCPT ); Wed, 2 Dec 2020 11:36:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726085AbgLBQgZ (ORCPT ); Wed, 2 Dec 2020 11:36:25 -0500 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4772C061A47 for ; Wed, 2 Dec 2020 08:35:05 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id i2so4707738wrs.4 for ; Wed, 02 Dec 2020 08:35:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3WGzIfA6C7tegyEi04/CfzUdmHOXOxjoWOJduGSUQyE=; b=xufwbiyfndlq9www+HitYnQ4Om5OM6SIJp1F7P1UJ+NyyghQUHqm2nOhKHdJB0cEtZ BoVR1VGxjU9DmNFqqVr2gaOtPKfJXvyVQSvfW3Dlt14yKW5FHulSvx8FVdPjTWu1GyYA XN8VH4fyBJIoPkblUKOptj8XKhNGJQcuressIi6H400oOcVrQBP0yvueJ7FPWtXhgRfe hk3SJT/QNt7mXP07NSwOjxsZkadJ9wYII7uq+pjFd4Gzkh7C2z/EJENeQ0EgJorIigFh tYPssNeE7JIjVRaS8M4D4OViCFJPviPunNVf/9s1mmLdK+r2b/dyewyowvYrpKuAfNZV Y/BQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3WGzIfA6C7tegyEi04/CfzUdmHOXOxjoWOJduGSUQyE=; b=t8rPo3Edm/t0n2OYJNKjTuoLLwkjIlVa6PfN+NGGP6ujVoh8ANXEGxepoF1yy2Xnik 122mgcWtax3uP2OSzo5RMnQWrimMV8uXqUdd1HxJGtehRO+LdPp34a6De04ONWmtuLG0 FdeLbKM7EXg/rGoyBFoORZPVghVdFhWLU3w7999OxZH/lfGAMqjFJMGFzz62oanPYZNV l+dUTM4ifGkc9hvPcB+Ifn4SYnwCqW0XW5YPcQ61gBhhX6yu1D31QXSs/qRCHbmrksmh 6ivsGuHjQTj2xqIJQoZG8ho2mlq2XpCk3mgThPytgn9o8+0B+qbGbi/9Zzj7pP0wsEVC GupQ== X-Gm-Message-State: AOAM532tfrJ1i5fEUkeTXBJxa/HzQ57FTkrlwUzhjcb7Ti1rRs78lTiI fOfHYkTX/CcuQLOfLUWQuxtL6g== X-Google-Smtp-Source: ABdhPJz6owAxFw1K0Tr73oPhzGgAmxNjqvheyMOIPEy3Z65U/oiP2GE3ODn1H1Ua2Rs8qwG5suXY1A== X-Received: by 2002:a5d:44c1:: with SMTP id z1mr4357446wrr.375.1606926904393; Wed, 02 Dec 2020 08:35:04 -0800 (PST) Received: from srini-hackbox.lan (cpc86377-aztw32-2-0-cust226.18-1.cable.virginm.net. [92.233.226.227]) by smtp.gmail.com with ESMTPSA id a21sm2443104wmb.38.2020.12.02.08.35.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Dec 2020 08:35:03 -0800 (PST) From: Srinivas Kandagatla To: linus.walleij@linaro.org, bjorn.andersson@linaro.org Cc: robh+dt@kernel.org, agross@kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, srinivas.kandagatla@linaro.org, Rob Herring Subject: [RESEND PATCH v6 1/2] dt-bindings: pinctrl: qcom: Add sm8250 lpass lpi pinctrl bindings Date: Wed, 2 Dec 2020 16:34:42 +0000 Message-Id: <20201202163443.26499-2-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20201202163443.26499-1-srinivas.kandagatla@linaro.org> References: <20201202163443.26499-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add device tree binding Documentation details for Qualcomm SM8250 LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver. Signed-off-by: Srinivas Kandagatla Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson --- .../pinctrl/qcom,lpass-lpi-pinctrl.yaml | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml new file mode 100644 index 000000000000..e47ebf934daf --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS) + Low Power Island (LPI) TLMM block + +maintainers: + - Srinivas Kandagatla + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + LPASS LPI IP on most Qualcomm SoCs + +properties: + compatible: + const: qcom,sm8250-lpass-lpi-pinctrl + + reg: + minItems: 2 + maxItems: 2 + + clocks: + items: + - description: LPASS Core voting clock + - description: LPASS Audio voting clock + + clock-names: + items: + - const: core + - const: audio + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "/schemas/pinctrl/pincfg-node.yaml" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9])$" + minItems: 1 + maxItems: 14 + + function: + enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws, + qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk, + dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data, + i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk, + dmic3_data, i2s2_data ] + description: + Specify the alternative function to be configured for the specified + pins. + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + slew-rate: + enum: [0, 1, 2, 3] + default: 0 + description: | + 0: No adjustments + 1: Higher Slew rate (faster edges) + 2: Lower Slew rate (slower edges) + 3: Reserved (No adjustments) + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - clock-names + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + lpi_tlmm: pinctrl@33c0000 { + compatible = "qcom,sm8250-lpass-lpi-pinctrl"; + reg = <0x33c0000 0x20000>, + <0x3550000 0x10000>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpi_tlmm 0 0 14>; + };