Message ID | 20191210164446.53912-1-paul@crapouillou.net |
---|---|
State | New |
Headers | show |
Series | pinctrl: ingenic: Fixup PIN_CONFIG_OUTPUT config | expand |
On Tue, Dec 10, 2019 at 5:44 PM Paul Cercueil <paul@crapouillou.net> wrote: > JZ4760 support was added in parallel of the previous patch so this one > slipped through. The first SoC to use the new register is the JZ4760 and > not the JZ4770, fix it here. > > Fixes: 7009d046a601 ("pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT > config") > > Signed-off-by: Paul Cercueil <paul@crapouillou.net> Patch applied for fixes. > The commit it fixes was added in v5.5-rc1, so I didn't Cc > linux-stable - I wasn't sure if I had to. No need for that when it is fixing a current -rc, that is what -rc:s are for. Yours, Linus Walleij
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index 24e0e2ef47a4..369e04350e3d 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -1809,7 +1809,7 @@ static void ingenic_set_bias(struct ingenic_pinctrl *jzpc, static void ingenic_set_output_level(struct ingenic_pinctrl *jzpc, unsigned int pin, bool high) { - if (jzpc->version >= ID_JZ4770) + if (jzpc->version >= ID_JZ4760) ingenic_config_pin(jzpc, pin, JZ4760_GPIO_PAT0, high); else ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DATA, high);
JZ4760 support was added in parallel of the previous patch so this one slipped through. The first SoC to use the new register is the JZ4760 and not the JZ4770, fix it here. Fixes: 7009d046a601 ("pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT config") Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- Notes: The commit it fixes was added in v5.5-rc1, so I didn't Cc linux-stable - I wasn't sure if I had to. drivers/pinctrl/pinctrl-ingenic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)