| Message ID | 20190218135927.30068-4-geert+renesas@glider.be |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl: sh-pfc: rcar-gen3: Rename IOCTRLx registers | expand |
> On February 18, 2019 at 2:59 PM Geert Uytterhoeven <geert+renesas@glider.be> wrote: > > > The R-Car Gen3 HardWare Manual Errata for Rev. 1.00 (Jul 2, 2018) > renamed the various miscellaneous I/O control registers (IOCTRLx) on > R-Car E3, to reflect better their actual purposes, and matching other > SoCs. > > Update to code to match this. Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> CU Uli
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c index 151640c30e9dc791..982b215fa0724549 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c @@ -4995,11 +4995,11 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { }; enum ioctrl_regs { - IOCTRL30, + POCCTRL0, }; static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { - [IOCTRL30] = { 0xe6060380, }, + [POCCTRL0] = { 0xe6060380, }, { /* sentinel */ }, }; @@ -5008,7 +5008,7 @@ static int r8a77990_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, { int bit = -EINVAL; - *pocctrl = pinmux_ioctrl_regs[IOCTRL30].reg; + *pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg; if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11)) bit = pin & 0x1f;
The R-Car Gen3 HardWare Manual Errata for Rev. 1.00 (Jul 2, 2018) renamed the various miscellaneous I/O control registers (IOCTRLx) on R-Car E3, to reflect better their actual purposes, and matching other SoCs. Update to code to match this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)