From patchwork Mon Oct 8 21:12:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 980818 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=mleia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42TY3p57Ynz9s9J for ; Tue, 9 Oct 2018 08:12:54 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726920AbeJIEZx (ORCPT ); Tue, 9 Oct 2018 00:25:53 -0400 Received: from mleia.com ([178.79.152.223]:35472 "EHLO mail.mleia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725794AbeJIEZx (ORCPT ); Tue, 9 Oct 2018 00:25:53 -0400 Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id 4411341E2C2; Mon, 8 Oct 2018 22:12:11 +0100 (BST) From: Vladimir Zapolskiy To: Lee Jones , Linus Walleij , Rob Herring Cc: Marek Vasut , Laurent Pinchart , Wolfram Sang , devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, Vladimir Zapolskiy Subject: [PATCH 3/7] dt-bindings: pinctrl: ds90ux9xx: add description of TI DS90Ux9xx pinmux Date: Tue, 9 Oct 2018 00:12:01 +0300 Message-Id: <20181008211205.2900-4-vz@mleia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181008211205.2900-1-vz@mleia.com> References: <20181008211205.2900-1-vz@mleia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20181008_221211_311768_E333BD88 X-CRM114-Status: GOOD ( 15.25 ) Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Vladimir Zapolskiy TI DS90Ux9xx de-/serializers have a capability to multiplex pin functions, in particular a pin may have selectable functions of GPIO, GPIO line transmitter, one of I2S lines, one of RGB24 video signal lines and so on. The change adds a description of DS90Ux9xx pin multiplexers and GPIO controllers. Signed-off-by: Vladimir Zapolskiy --- .../bindings/pinctrl/ti,ds90ux9xx-pinctrl.txt | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/ti,ds90ux9xx-pinctrl.txt diff --git a/Documentation/devicetree/bindings/pinctrl/ti,ds90ux9xx-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ti,ds90ux9xx-pinctrl.txt new file mode 100644 index 000000000000..fbfa1a3cdf9f --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/ti,ds90ux9xx-pinctrl.txt @@ -0,0 +1,83 @@ +TI DS90Ux9xx de-/serializer pinmux and GPIO subcontroller + +Required properties: +- compatible: Must contain a generic "ti,ds90ux9xx-pinctrl" value and + may contain one more specific value from the list: + "ti,ds90ux925-pinctrl", + "ti,ds90ux926-pinctrl", + "ti,ds90ux927-pinctrl", + "ti,ds90ux928-pinctrl", + "ti,ds90ux940-pinctrl". + +- gpio-controller: Marks the device node as a GPIO controller. + +- #gpio-cells: Must be set to 2, + - the first cell is the GPIO offset number within the controller, + - the second cell is used to specify the GPIO line polarity. + +- gpio-ranges: Mapping to pin controller pins (as described in + Documentation/devicetree/bindings/gpio/gpio.txt) + +Optional properties: +- ti,video-depth-18bit: Sets video bridge pins to RGB 18-bit mode. + +Available pins, groups and functions (reference to device datasheets): + +function: "gpio" ("gpio4" is on DS90Ux925 and DS90Ux926 only, + "gpio9" is on DS90Ux940 only) + - pins: "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", + "gpio7", "gpio8", "gpio9" + +function: "gpio-remote" + - pins: "gpio0", "gpio1", "gpio2", "gpio3" + +function: "pass" (DS90Ux940 specific only) + - pins: "gpio0", "gpio3" + +function: "i2s-1" + - group: "i2s-1" + +function: "i2s-2" + - group: "i2s-2" + +function: "i2s-3" (DS90Ux927, DS90Ux928 and DS90Ux940 specific only) + - group: "i2s-3" + +function: "i2s-4" (DS90Ux927, DS90Ux928 and DS90Ux940 specific only) + - group: "i2s-4" + +function: "i2s-m" (DS90Ux928 and DS90Ux940 specific only) + - group: "i2s-m" + +function: "parallel" (DS90Ux925 and DS90Ux926 specific only) + - group: "parallel" + +Example (deserializer with pins GPIO[3:0] set to bridged output + function and pin GPIO4 in standard hogged GPIO function): + +deserializer { + compatible = "ti,ds90ub928q", "ti,ds90ux9xx"; + + ds90ux928_pctrl: pin-controller { + compatible = "ti,ds90ux928-pinctrl", "ti,ds90ux9xx-pinctrl"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&ds90ux928_pctrl 0 0 8>; + + pinctrl-names = "default"; + pinctrl-0 = <&ds90ux928_pins>; + + ds90ux928_pins: pinmux { + gpio-remote { + pins = "gpio0", "gpio1", "gpio2", "gpio3"; + function = "gpio-remote"; + }; + }; + + rst { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + }; + }; +};