From patchwork Thu Oct 4 15:33:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 978999 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42Qxjy2MVLz9s8J for ; Fri, 5 Oct 2018 01:33:26 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727432AbeJDW1L (ORCPT ); Thu, 4 Oct 2018 18:27:11 -0400 Received: from mga12.intel.com ([192.55.52.136]:5963 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727472AbeJDW1L (ORCPT ); Thu, 4 Oct 2018 18:27:11 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Oct 2018 08:33:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,340,1534834800"; d="scan'208";a="78480343" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 04 Oct 2018 08:33:22 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9949081; Thu, 4 Oct 2018 18:33:21 +0300 (EEST) From: Andy Shevchenko To: Linus Walleij , linux-gpio@vger.kernel.org, Mika Westerberg Cc: Andy Shevchenko Subject: [PATCH v1 2/4] pinctrl: geminilake: Add vGPIO pins Date: Thu, 4 Oct 2018 18:33:19 +0300 Message-Id: <20181004153321.34757-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181004153321.34757-1-andriy.shevchenko@linux.intel.com> References: <20181004153321.34757-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Intel Gemini Lake provides vGPIO pins which are now missed from the list. Add them here. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-geminilake.c | 43 +++++++++++++++++++++- 1 file changed, 41 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-geminilake.c b/drivers/pinctrl/intel/pinctrl-geminilake.c index 105881e5c042..189527bee47e 100644 --- a/drivers/pinctrl/intel/pinctrl-geminilake.c +++ b/drivers/pinctrl/intel/pinctrl-geminilake.c @@ -112,6 +112,37 @@ static const struct pinctrl_pin_desc glk_northwest_pins[] = { PINCTRL_PIN(77, "GPIO_212"), PINCTRL_PIN(78, "GPIO_213"), PINCTRL_PIN(79, "GPIO_214"), + PINCTRL_PIN(80, "vCNV_BTEN"), + PINCTRL_PIN(81, "vCNV_GNEN"), + PINCTRL_PIN(82, "vCNV_WFEN"), + PINCTRL_PIN(83, "vCNV_WCEN"), + PINCTRL_PIN(84, "vCNV_BT_HOST_WAKEB"), + PINCTRL_PIN(85, "vCNV_BT_IF_SELECT"), + PINCTRL_PIN(86, "vCNV_BT_UART_TXD"), + PINCTRL_PIN(87, "vCNV_BT_UART_RXD"), + PINCTRL_PIN(88, "vCNV_BT_UART_CTS_B"), + PINCTRL_PIN(89, "vCNV_BT_UART_RTS_B"), + PINCTRL_PIN(90, "vCNV_MFUART1_TXD"), + PINCTRL_PIN(91, "vCNV_MFUART1_RXD"), + PINCTRL_PIN(92, "vCNV_MFUART1_CTS_B"), + PINCTRL_PIN(93, "vCNV_MFUART1_RTS_B"), + PINCTRL_PIN(94, "vCNV_GNSS_UART_TXD"), + PINCTRL_PIN(95, "vCNV_GNSS_UART_RXD"), + PINCTRL_PIN(96, "vCNV_GNSS_UART_CTS_B"), + PINCTRL_PIN(97, "vCNV_GNSS_UART_RTS_B"), + PINCTRL_PIN(98, "vLPSS_UART0_TXD"), + PINCTRL_PIN(99, "vLPSS_UART0_RXD"), + PINCTRL_PIN(100, "vLPSS_UART0_CTS_B"), + PINCTRL_PIN(101, "vLPSS_UART0_RTS_B"), + PINCTRL_PIN(102, "vLPSS_UART1_TXD"), + PINCTRL_PIN(103, "vLPSS_UART1_RXD"), + PINCTRL_PIN(104, "vLPSS_UART1_CTS_B"), + PINCTRL_PIN(105, "vLPSS_UART1_RTS_B"), + PINCTRL_PIN(106, "vLPSS_UART2_TXD"), + PINCTRL_PIN(107, "vLPSS_UART2_RXD"), + PINCTRL_PIN(108, "vLPSS_UART2_CTS_B"), + PINCTRL_PIN(109, "vLPSS_UART2_RTS_B"), + PINCTRL_PIN(110, "vCNV_GNSS_HOST_WAKEB"), }; static const unsigned int glk_northwest_uart1_pins[] = { 26, 27, 28, 29 }; @@ -171,7 +202,7 @@ static const struct intel_function glk_northwest_functions[] = { }; static const struct intel_community glk_northwest_communities[] = { - GLK_COMMUNITY(0, 79), + GLK_COMMUNITY(0, 110), }; static const struct intel_pinctrl_soc_data glk_northwest_soc_data = { @@ -340,10 +371,18 @@ static const struct pinctrl_pin_desc glk_audio_pins[] = { PINCTRL_PIN(17, "AVS_M_DATA_1"), PINCTRL_PIN(18, "AVS_M_CLK_AB2"), PINCTRL_PIN(19, "AVS_M_DATA_2"), + PINCTRL_PIN(20, "vCNV_BT_I2S_BCLK"), + PINCTRL_PIN(21, "vCNV_BT_I2S_WS_SYNC"), + PINCTRL_PIN(22, "vCNV_BT_I2S_SDO"), + PINCTRL_PIN(23, "vCNV_BT_I2S_SDI"), + PINCTRL_PIN(24, "vAVS_I2S0_BCLK"), + PINCTRL_PIN(25, "vAVS_I2S0_WS_SYNC"), + PINCTRL_PIN(26, "vAVS_I2S0_SDO"), + PINCTRL_PIN(27, "vAVS_I2S0_SDI"), }; static const struct intel_community glk_audio_communities[] = { - GLK_COMMUNITY(0, 19), + GLK_COMMUNITY(0, 27), }; static const struct intel_pinctrl_soc_data glk_audio_soc_data = {