| Message ID | 20180126011400.2191-2-sboyd@codeaurora.org |
|---|---|
| State | New |
| Headers | show |
| Series | Support qcom pinctrl protected pins | expand |
On Thu, 2018-01-25 at 17:13 -0800, Stephen Boyd wrote: > Some qcom platforms make some GPIOs or pins unavailable for use > by non-secure operating systems, and thus reading or writing the > registers for those pins will cause access control issues. > Introduce a DT property to describe the set of GPIOs that are > available for use so that higher level OSes are able to know what > pins to avoid reading/writing. > gpio-controller; > #gpio-cells = <2>; > ngpios = <18>; > + reserved-gpio-ranges = <0 4>, <12 2>; What about preserving namespace, i.e. gpio-reserved-ranges vs. your variant?
On Thu 25 Jan 17:13 PST 2018, Stephen Boyd wrote: + Rob > Some qcom platforms make some GPIOs or pins unavailable for use > by non-secure operating systems, and thus reading or writing the > registers for those pins will cause access control issues. > Introduce a DT property to describe the set of GPIOs that are > available for use so that higher level OSes are able to know what > pins to avoid reading/writing. > > Cc: Grant Likely <grant.likely@secretlab.ca> > Cc: <devicetree@vger.kernel.org> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > Documentation/devicetree/bindings/gpio/gpio.txt | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt > index b5de08e3b1a2..c22b56680fc8 100644 > --- a/Documentation/devicetree/bindings/gpio/gpio.txt > +++ b/Documentation/devicetree/bindings/gpio/gpio.txt > @@ -151,9 +151,9 @@ in a lot of designs, some using all 32 bits, some using 18 and some using > first 18 GPIOs, at local offset 0 .. 17, are in use. > > If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an > -additional bitmask is needed to specify which GPIOs are actually in use, > -and which are dummies. The bindings for this case has not yet been > -specified, but should be specified if/when such hardware appears. > +additional set of tuples is needed to specify which GPIOs are unusable, with > +the reserved-gpio-ranges binding. This property indicates the start and size > +of the GPIOs that can't be used. > > Optionally, a GPIO controller may have a "gpio-line-names" property. This is > an array of strings defining the names of the GPIO lines going out of the > @@ -178,6 +178,7 @@ gpio-controller@00000000 { > gpio-controller; > #gpio-cells = <2>; > ngpios = <18>; > + reserved-gpio-ranges = <0 4>, <12 2>; > gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R", > "LED G", "LED B", "Col A", "Col B", "Col C", "Col D", > "Row A", "Row B", "Row C", "Row D", "NMI button", > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Stephen, thanks for the patch and hope you have a good time at your new workplace! On Fri, Jan 26, 2018 at 2:13 AM, Stephen Boyd <sboyd@codeaurora.org> wrote: > Some qcom platforms make some GPIOs or pins unavailable for use > by non-secure operating systems, and thus reading or writing the > registers for those pins will cause access control issues. > Introduce a DT property to describe the set of GPIOs that are > available for use so that higher level OSes are able to know what > pins to avoid reading/writing. > > Cc: Grant Likely <grant.likely@secretlab.ca> > Cc: <devicetree@vger.kernel.org> > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> This looks fine except Andy's note to rename this ranges to gpio-reserved-ranges for namespacing. Are you reposting this series as v3 with this fixed or does someone else need to pick it up? Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 3/19/18 10:36 PM, Linus Walleij wrote: > This looks fine except Andy's note to rename this ranges > to gpio-reserved-ranges for namespacing. > > Are you reposting this series as v3 with this fixed or does someone > else need to pick it up? I will pick this up if Stephen wants me to.
Quoting Linus Walleij (2018-03-19 20:36:35) > Hi Stephen, > > thanks for the patch and hope you have a good time at your new > workplace! > > On Fri, Jan 26, 2018 at 2:13 AM, Stephen Boyd <sboyd@codeaurora.org> wrote: > > > Some qcom platforms make some GPIOs or pins unavailable for use > > by non-secure operating systems, and thus reading or writing the > > registers for those pins will cause access control issues. > > Introduce a DT property to describe the set of GPIOs that are > > available for use so that higher level OSes are able to know what > > pins to avoid reading/writing. > > > > Cc: Grant Likely <grant.likely@secretlab.ca> > > Cc: <devicetree@vger.kernel.org> > > Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> > > This looks fine except Andy's note to rename this ranges > to gpio-reserved-ranges for namespacing. Ok! I'll rename to gpio-reserved-ranges. > > Are you reposting this series as v3 with this fixed or does someone > else need to pick it up? Yes I can do it today or tomorrow. -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index b5de08e3b1a2..c22b56680fc8 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -151,9 +151,9 @@ in a lot of designs, some using all 32 bits, some using 18 and some using first 18 GPIOs, at local offset 0 .. 17, are in use. If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an -additional bitmask is needed to specify which GPIOs are actually in use, -and which are dummies. The bindings for this case has not yet been -specified, but should be specified if/when such hardware appears. +additional set of tuples is needed to specify which GPIOs are unusable, with +the reserved-gpio-ranges binding. This property indicates the start and size +of the GPIOs that can't be used. Optionally, a GPIO controller may have a "gpio-line-names" property. This is an array of strings defining the names of the GPIO lines going out of the @@ -178,6 +178,7 @@ gpio-controller@00000000 { gpio-controller; #gpio-cells = <2>; ngpios = <18>; + reserved-gpio-ranges = <0 4>, <12 2>; gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R", "LED G", "LED B", "Col A", "Col B", "Col C", "Col D", "Row A", "Row B", "Row C", "Row D", "NMI button",
Some qcom platforms make some GPIOs or pins unavailable for use by non-secure operating systems, and thus reading or writing the registers for those pins will cause access control issues. Introduce a DT property to describe the set of GPIOs that are available for use so that higher level OSes are able to know what pins to avoid reading/writing. Cc: Grant Likely <grant.likely@secretlab.ca> Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> --- Documentation/devicetree/bindings/gpio/gpio.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)