From patchwork Fri Oct 6 10:13:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 822324 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y7lqc5dK1z9t4R for ; Fri, 6 Oct 2017 21:14:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751931AbdJFKOV (ORCPT ); Fri, 6 Oct 2017 06:14:21 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:50819 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751913AbdJFKOO (ORCPT ); Fri, 6 Oct 2017 06:14:14 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id D6B13209BA; Fri, 6 Oct 2017 12:14:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 6A6B3209B0; Fri, 6 Oct 2017 12:14:11 +0200 (CEST) From: Miquel Raynal To: Greg Kroah-Hartman , Linus Walleij , Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Jiri Slaby , Catalin Marinas , Will Deacon Cc: linux-serial@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, Thomas Petazzoni , Antoine Tenart , Nadav Haklai , Wilson Ding , Allen Yan , Miquel Raynal Subject: [PATCH 08/16] serial: mvebu-uart: clear state register before IRQ request Date: Fri, 6 Oct 2017 12:13:36 +0200 Message-Id: <20171006101344.15590-9-miquel.raynal@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171006101344.15590-1-miquel.raynal@free-electrons.com> References: <20171006101344.15590-1-miquel.raynal@free-electrons.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Allen Yan When receiving data on RX pin before ->uart_startup() is called, some error bits in the state register could be set up (like BRK_DET). This is harmless when using only the standard UART (error bits are read-only), but may procude an endless loop once in the extended UART RX interrupt handler (error bits must be cleared). Clear the status register in ->uart_startup() to avoid this situation. Signed-off-by: Allen Yan Signed-off-by: Miquel Raynal Reviewed-by: Gregory CLEMENT --- drivers/tty/serial/mvebu-uart.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c index 81a3d2714fd3..67f302748b78 100644 --- a/drivers/tty/serial/mvebu-uart.c +++ b/drivers/tty/serial/mvebu-uart.c @@ -322,6 +322,12 @@ static int mvebu_uart_startup(struct uart_port *port) writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST, port->membase + UART_CTRL(port)); udelay(1); + + /* Clear the error bits of state register before IRQ request */ + ret = readl(port->membase + UART_STAT); + ret |= STAT_BRK_ERR; + writel(ret, port->membase + UART_STAT); + writel(CTRL_BRK_INT, port->membase + UART_CTRL(port)); ctl = readl(port->membase + UART_INTR(port));