From patchwork Fri Sep 1 18:57:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 808965 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Pzwcx9pD"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xkT8c32Hmz9sPt for ; Sat, 2 Sep 2017 05:00:32 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752519AbdIAS54 (ORCPT ); Fri, 1 Sep 2017 14:57:56 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:34279 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752516AbdIAS5x (ORCPT ); Fri, 1 Sep 2017 14:57:53 -0400 Received: by mail-wm0-f65.google.com with SMTP id l19so969453wmi.1; Fri, 01 Sep 2017 11:57:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0jQSsIRyQ2mDinfnKtVeYyb7EEdXnkvYSys82YoLMHU=; b=Pzwcx9pDz2CGcIeiHVC9k32D0CEemC4SNSVgWa9xfhWgRdGUzvAKzBWv0471uKE9Ql klhV/2cv/V0gkOSTOLarpLLfrDJvYVYhqSHEG6zW6uaeeNiWcEJrjMITFGrMJtdTecxO QWlL7U7ajbNNWjZk2wzOzYI2mAbU0j2+kDhIbV246d22rkreCaGSpXbk1m4UsPuuuEhP Qv8s3bGhYSLJ+A+Jvh/0AuryFmfdFBLPcQkyl7k0bqm4Gxnfhv+z/G4WDKP5BZRmQU0v W41FZYgm8i+lslAfwHFS2etRQTjD6fmRJ48d5usUxwgnCae85TqSNIwm7Aa6wtVkijKd 9CIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0jQSsIRyQ2mDinfnKtVeYyb7EEdXnkvYSys82YoLMHU=; b=ekMaM4KVrsrPDfdslEMjy+kofzGUTrykm8Xe3pGur1tzJ7D08PD8isceup7p1KZ/ph PKnYLRs37ac4GU5dH9UwraDSQznOl1UNLMphZUfseGeeX2HU87X7ihgSuf479g+A/mI8 IQp0Kpiw8b/F9wRdmBCpjWGWoD94kb7DOYQVZYGQiDM2719VrCQv4NkmyTSh9cAJUkss b6u4/jRFwn1VC0zAIV8MfHWcnWtf6gN23ogoxvUl2viDoqxQu85Bnt2BSMIhNP16Dh84 9hunLrNv3g84nuF7xS/DQRuzc9YuOO0yUNxSFFcyw/fAEjBrU2Bah/+lZzS4xTTFmNlc C0uw== X-Gm-Message-State: AHPjjUgdnfb+PD4tO0CS2GlJJ12j9tNum4kQDI5bjXHNW1v/Gw9g8wUr AMOyJqaYgpddWA== X-Google-Smtp-Source: ADKCNb4NQTqv3P2Mpm0pFqxsYtSjeX7MabV3D9W5dII9Y91h/1OiTtlmyh1sppdqxgAZueS7oYotFw== X-Received: by 10.28.94.84 with SMTP id s81mr1020631wmb.3.1504292271937; Fri, 01 Sep 2017 11:57:51 -0700 (PDT) Received: from localhost (p200300E41BD6D60076D02BFFFE273F51.dip0.t-ipconnect.de. [2003:e4:1bd6:d600:76d0:2bff:fe27:3f51]) by smtp.gmail.com with ESMTPSA id p65sm927080wmg.44.2017.09.01.11.57.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 01 Sep 2017 11:57:51 -0700 (PDT) From: Thierry Reding To: Linus Walleij Cc: Jonathan Hunter , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/16] gpio: Move irq_nested into struct gpio_irq_chip Date: Fri, 1 Sep 2017 20:57:28 +0200 Message-Id: <20170901185736.28051-9-thierry.reding@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170901185736.28051-1-thierry.reding@gmail.com> References: <20170901185736.28051-1-thierry.reding@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Thierry Reding In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding --- drivers/gpio/gpiolib.c | 12 ++++++------ include/linux/gpio/driver.h | 9 +++++++-- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index f09cc89929f0..f506473f5c70 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1624,7 +1624,7 @@ void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip, struct irq_chip *irqchip, unsigned int parent_irq) { - if (!gpiochip->irq_nested) { + if (!gpiochip->irq.nested) { chip_err(gpiochip, "tried to nest a chained gpiochip\n"); return; } @@ -1659,7 +1659,7 @@ int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_set_lockdep_class(irq, chip->lock_key); irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler); /* Chips that use nested thread handlers have them marked */ - if (chip->irq_nested) + if (chip->irq.nested) irq_set_nested_thread(irq, 1); irq_set_noprobe(irq); @@ -1678,7 +1678,7 @@ void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) { struct gpio_chip *chip = d->host_data; - if (chip->irq_nested) + if (chip->irq.nested) irq_set_nested_thread(irq, 0); irq_set_chip_and_handler(irq, NULL, NULL); irq_set_chip_data(irq, NULL); @@ -1811,9 +1811,9 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip) data); } - gpiochip->irq_nested = false; + gpiochip->irq.nested = false; } else { - gpiochip->irq_nested = true; + gpiochip->irq.nested = true; } /* @@ -1930,7 +1930,7 @@ int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip, pr_err("missing gpiochip .dev parent pointer\n"); return -EINVAL; } - gpiochip->irq_nested = nested; + gpiochip->irq.nested = nested; of_node = gpiochip->parent->of_node; #ifdef CONFIG_OF_GPIO /* diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index c3eafd874884..7d632a8932be 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -107,6 +107,13 @@ struct gpio_irq_chip { * A list of interrupt parents for each line of a GPIO chip. */ unsigned int *map; + + /** + * @nested: + * + * True if set the interrupt handling is nested. + */ + bool nested; }; static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip) @@ -176,7 +183,6 @@ static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip) * safely. * @bgpio_dir: shadowed direction register for generic GPIO to clear/set * direction safely. - * @irq_nested: True if set the interrupt handling is nested. * @irq_need_valid_mask: If set core allocates @irq_valid_mask with all * bits set to one * @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to @@ -248,7 +254,6 @@ struct gpio_chip { * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib * to handle IRQs for most practical cases. */ - bool irq_nested; bool irq_need_valid_mask; unsigned long *irq_valid_mask; struct lock_class_key *lock_key;