From patchwork Mon Mar 12 14:26:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 884527 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=glider.be Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 400L0C657tz9sP9 for ; Tue, 13 Mar 2018 01:26:51 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751496AbeCLO0u (ORCPT ); Mon, 12 Mar 2018 10:26:50 -0400 Received: from andre.telenet-ops.be ([195.130.132.53]:58060 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751232AbeCLO0t (ORCPT ); Mon, 12 Mar 2018 10:26:49 -0400 Received: from ayla.of.borg ([84.194.111.163]) by andre.telenet-ops.be with bizsmtp id M2So1x00D3XaVaC012SoU7; Mon, 12 Mar 2018 15:26:48 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.86_2) (envelope-from ) id 1evOPY-0007EV-73; Mon, 12 Mar 2018 15:26:48 +0100 Received: from geert by ramsan with local (Exim 4.86_2) (envelope-from ) id 1evOPY-0002rJ-67; Mon, 12 Mar 2018 15:26:48 +0100 From: Geert Uytterhoeven To: Laurent Pinchart , Linus Walleij Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH] pinctrl: sh-pfc: r8a7790: Add missing TX_ER pin to avb_mii group Date: Mon, 12 Mar 2018 15:26:42 +0100 Message-Id: <1520864802-10948-1-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 2.7.4 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The pin controller drivers for all R-Car Gen2 SoCs have entries for the EtherAVB TX_ER pins in their EtherAVB MII groups, except on R-Car H2. Add the missing pin to restore consistency. Note that technically TX_ER is an optional signal in the MII bus, and thus could have its own group, but this is currently not supported by any R-Car Gen2 pin controller driver. Fixes: 19ef697d1eb7be06 ("sh-pfc: r8a7790: add EtherAVB pin groups") Signed-off-by: Geert Uytterhoeven Reviewed-by: Simon Horman --- There are no upstream users of EtherAVB MII. To be queued im sh-pfc-for-v4.17. --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index b769c05480da681e..f6332f247368fcb8 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -1835,8 +1835,8 @@ static const unsigned int avb_mii_pins[] = { RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), - RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 10), - RCAR_GP_PIN(3, 12), + RCAR_GP_PIN(2, 10), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9), + RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 12), }; static const unsigned int avb_mii_mux[] = { AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK, @@ -1846,8 +1846,8 @@ static const unsigned int avb_mii_mux[] = { AVB_RXD3_MARK, AVB_RX_ER_MARK, AVB_RX_CLK_MARK, AVB_RX_DV_MARK, - AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_CLK_MARK, - AVB_COL_MARK, + AVB_CRS_MARK, AVB_TX_EN_MARK, AVB_TX_ER_MARK, + AVB_TX_CLK_MARK, AVB_COL_MARK, }; static const unsigned int avb_gmii_pins[] = { RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),